4 Commits

Author	SHA1	Message	Date
tangxifan	780fc0f26d	[core] developing validators and annotate rr_segment for clock arch	2023-02-26 18:03:55 -08:00
tangxifan	7f07a9d031	[lib] add default seg/switch to clock arch. Fixed syntax	2023-02-24 19:15:39 -08:00
tangxifan	aafd1e6fb3	[lib] syntax	2023-02-22 21:02:35 -08:00
tangxifan	e7fc065032	[lib] start developing clock arch data structure and I/O	2023-02-21 15:06:35 -08:00