Commit Graph

452 Commits

Author SHA1 Message Date
Aram Kostanyan bd158311c5 Fixed typo in documentation and updated 'benchmark_sweep/iwls2005' task to use list of HDL files for 'iwls2005/ethernet' benchmark. 2022-01-18 14:07:41 +05:00
Aram Kostanyan 588ee14920 Merge branch 'master' into issue-483 2022-01-18 13:38:12 +05:00
Aram Kostanyan fb2e4377c8 Added missing changes from previous commit. 2022-01-17 19:42:40 +05:00
Aram Kostanyan 2b008177e7 Updated documentation. 2022-01-17 14:58:20 +05:00
Awais Abbas 54d4f30592 OpenFPGA Documentation updated for yosys only support 2022-01-14 16:14:48 +05:00
tangxifan 80c6d5887d Merge branch 'ql_mem_bank_opensource' of https://github.com/RapidSilicon/OpenFPGA_RS into ql_mem_bank 2021-12-29 10:57:46 -08:00
tangxifan b2ba0d0c42 [Doc] Add version naming convention to developer guidelines 2021-12-22 15:12:14 -08:00
nadeemyaseen-rs 236910cde4 Merge remote-tracking branch 'upstream/master' into update_from_upstream 2021-12-09 00:00:21 +05:00
tangxifan 1e5afb985c
Update contact.rst 2021-11-30 20:25:15 -08:00
nadeemyaseen-rs 1ea56b2d18 Merge remote-tracking branch 'upstream/master' into update_from_upstream 2021-11-18 00:00:55 +05:00
Aram Kostanyan a355977420 Adding Yosys+Verific support. 2021-10-29 18:34:27 +05:00
tangxifan b8d5920529 Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into upstream 2021-10-28 15:45:58 -07:00
Ganesh Gore 130805d50c Updated CI documentation 2021-10-21 15:17:30 -06:00
nadeemyaseen-rs e0cfd46ec7 Merge remote-tracking branch 'upstream/master' into update_from_upstream 2021-10-14 19:25:31 +05:00
tangxifan 57159fc121 [Doc] Update documentation for the new syntax in configuration protocol and fabric key file format 2021-10-10 17:46:45 -07:00
tangxifan 40b589dc6d [Doc] Update documentation about the clock definition for programming clocks in simulation settings 2021-10-06 13:50:33 -07:00
tangxifan 03bcf6dee5 [Doc] Update documenation for the new option ``--keep_dont_care_bits`` 2021-10-05 19:23:42 -07:00
tangxifan ff339312f6 [Doc] Update documentation about the limitations of multi-region configuration protocols 2021-10-05 11:55:10 -07:00
tangxifan 9a7e0f761a [Doc] Add fabric bitstream file format for QL memory bank 2021-10-04 12:29:49 -07:00
tangxifan a01fa7c282 [Doc] Add figures and text to explain the difference between the XML syntax for QuickLogic memory bank 2021-10-04 12:09:42 -07:00
tangxifan b0a97a7052 [Doc] Update doc about WLR usage for QL memory bank 2021-09-27 10:24:04 -07:00
tangxifan f9bceff33a [Doc] Update documentation for the flatten BL/WL protocols 2021-09-25 20:44:45 -07:00
tangxifan 10774dc15c [Doc] Updated documentation about new syntax in fabric key 2021-09-21 17:01:52 -07:00
tangxifan d9d959709c [Doc] Add missing figures 2021-09-20 20:31:53 -07:00
tangxifan 3146d2484f [Doc] Update documentation on the WLR definition for circuit model 2021-09-20 17:21:33 -07:00
tangxifan 73d21c9730 [Doc] Update doc about how to use the QuickLogic memory bank 2021-09-10 15:30:37 -07:00
tangxifan 801b91f776
Merge branch 'master' into tutorials 2021-08-31 17:17:40 -07:00
ANDREW HARRIS POND 1c09b8c3e0 fixed python instruction 2021-08-17 10:18:51 -06:00
bbleaptrot 814d290463
Merge branch 'master' into tutorials 2021-08-05 10:24:34 -06:00
bbleaptrot c867c7e628
Update index to include FAQ page 2021-07-28 10:14:31 -06:00
bbleaptrot 2bb76e4a82
Update to include suggested changes 2021-07-28 10:13:25 -06:00
bbleaptrot 17d3fb5d5e
Add FAQ to source folder to go along in appendix 2021-07-28 10:10:17 -06:00
Andrew Pond a8a8c25a21
Update compile.rst 2021-07-26 15:18:23 -06:00
Andrew Pond 1c0bec1c5a
Update compile.rst 2021-07-26 15:17:25 -06:00
Andrew Pond 3ce866f2eb
Update compile.rst 2021-07-26 15:12:59 -06:00
tangxifan 43afaca17c [Doc] Add more details about the new syntax 2021-07-01 23:51:54 -06:00
tangxifan 0851075bc9 [Doc] Update documentation about the new feature in pin constraint file 2021-07-01 23:47:36 -06:00
tangxifan ac9046b7d2 [Doc] Remove ``define_simulation.v`` since it is no longer needed. 2021-06-29 15:38:35 -06:00
tangxifan 30027b8c15 [Doc] Update doc to deprecate anything related to '--support_icarus_simulator' and '--include_signal_init' 2021-06-25 15:27:15 -06:00
tangxifan 11d0283771 [Doc] Remove option '--support_icarus_simulator'. Add option '--embed_bitstream' 2021-06-25 15:11:12 -06:00
tangxifan 507f5ee54c [Doc] Update documentation about time unit support in writing simulation file 2021-06-25 10:34:43 -06:00
tangxifan 8e2ba718d0 [Doc] update documentation on the new option '--testbench_type' 2021-06-25 10:16:48 -06:00
tangxifan 779437cd37 [Doc] Update documentation to remove out-of-date options related to signal_init 2021-06-24 17:07:15 -06:00
bbleaptrot de550ac550
Merge branch 'master' into tutorials 2021-06-16 14:00:31 -06:00
bbleaptrot 7787fe9795
update reference to match doc page 2021-06-16 12:46:43 -06:00
bbleaptrot 858bb2f21e
fix mistake in first line of page 2021-06-16 12:45:04 -06:00
bbleaptrot 624e9f3bb7
Update notation at top to match pages in doc 2021-06-16 12:44:01 -06:00
bbleaptrot ece6e92f06
Add video at top of page 2021-06-16 12:29:17 -06:00
bbleaptrot 7a303463c3
Update shell_shortcuts.rst
Update grammar. <_openfpga_task_args> no longer works
2021-06-14 15:34:13 -06:00
bbleaptrot 5e8b5d641f
Update compile.rst
update grammar
2021-06-14 14:51:19 -06:00