3 Commits

Author	SHA1	Message	Date
tangxifan	a5138113e4	add fast configuration testcase	2020-06-11 19:31:12 -06:00
tangxifan	8b3e79766c	add fast configuration option to fpga_verilog to speed up full testbench simulation	2020-06-11 19:31:12 -06:00
tangxifan	827e2e6713	file moving in regression tests	2020-06-11 19:31:11 -06:00