4 Commits

Author	SHA1	Message	Date
Baudouin Chauviere	b48a27acf0	Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb	2019-05-13 14:45:57 -06:00
Baudouin Chauviere	2019840d7c	cleaned unused variables	2019-05-13 14:45:02 -06:00
tangxifan	be4643b8a6	updated Verilog generator to use compact CBs and SBs. SPICE generator to be updated	2019-05-10 10:21:06 -06:00
tangxifan	46d44fa42a	Update VPR7 X2P with new engine	2019-04-26 12:23:47 -06:00