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OpenFPGA
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2 Commits

Author SHA1 Message Date
tangxifan 73386dd1a9 refactored the Verilog header generation 2019-12-04 17:55:05 -07:00
tangxifan 322228de43 remove legacy codes in FPGA-Verilog 2019-12-04 16:02:43 -07:00