4 Commits

Author	SHA1	Message	Date
tangxifan	e6c896d583	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
tangxifan	0eeb8e5317	clean up example architecture XML by removing redundant syntax	2020-04-07 11:24:42 -06:00
tangxifan	1651c9ca18	add binding between physical pb_type and circuit models	2020-01-28 16:03:02 -07:00
tangxifan	01c80b9126	add sample architecture to be used for Openfpga	2020-01-27 13:39:13 -07:00