tangxifan
|
7ade48343c
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[Tool] Deprecate command 'write_verilog_testbench'
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2021-06-09 17:06:01 -06:00 |
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tangxifan
|
b719419931
|
[Doc] Update documentation on the FPGA-Verilog commands in openfpga shell; Deprecated the 'write_verilog_testbench' command
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2021-06-09 16:59:02 -06:00 |
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tangxifan
|
eed30605d7
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[Test] patch test case
|
2021-06-09 15:20:55 -06:00 |
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tangxifan
|
d545069aac
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[Script] Bug fix
|
2021-06-09 14:50:37 -06:00 |
|
tangxifan
|
52c0ed571b
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[Test] Patch test case to use proper template
|
2021-06-09 14:27:02 -06:00 |
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tangxifan
|
c62666e7c3
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[Test] Use proper template for some failing tests
|
2021-06-09 14:24:34 -06:00 |
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tangxifan
|
4e3f589810
|
[Script] Patch openfpga shell script to use the new option '--support_icarus_simulator' for 'write_preconfigured_testbench'
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2021-06-09 13:53:28 -06:00 |
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tangxifan
|
2299ce3157
|
[Tool] Preconfigured testbench writer now supports icarus simulator
|
2021-06-09 13:49:25 -06:00 |
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tangxifan
|
f9404dc97d
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[Script] Patch openfpga shell script due to missing a mandatory option in 'write_full_testbench'
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2021-06-09 11:55:25 -06:00 |
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tangxifan
|
9adf94bfd3
|
[Script] Update all the openshell scripts to deprecate 'write_verilog_testbench'
|
2021-06-09 11:18:52 -06:00 |
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tangxifan
|
3bc8e760db
|
[Tool] Add '--fabric_netlist' option to 'write_preconfigured_testbench' command
|
2021-06-09 11:14:45 -06:00 |
|
tangxifan
|
89fb672631
|
[Tool] Fine-tune the options of 'write_simulation_task_info' to be straightforward to use
|
2021-06-09 10:49:00 -06:00 |
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tangxifan
|
be26c06673
|
[Script] Update an example script to use 'write_preconfigured_fabric_wrapper' and 'write_preconfigured_testbench' in place of 'write_verilog_testbench'
|
2021-06-09 10:41:22 -06:00 |
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tangxifan
|
97396eda2b
|
[Tool] Add a new command 'write_simulation_task_info'
|
2021-06-08 22:10:02 -06:00 |
|
tangxifan
|
d2275b971d
|
[Tool] Add a new command 'write_preconfigured_testbench'
|
2021-06-08 21:53:51 -06:00 |
|
tangxifan
|
d2495a4e47
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-08 21:34:33 -06:00 |
|
tangxifan
|
85679c0fe2
|
[Tool] Bug fix in the top testbench switch due to fast configuration
|
2021-06-08 21:32:26 -06:00 |
|
tangxifan
|
8db19c7af9
|
[Tool] Add a new command 'write_preconfigured_fabric_wrapper'
|
2021-06-08 21:28:16 -06:00 |
|
tangxifan
|
5075c68418
|
[Tool] Remove duplicated codes on fast configuration
|
2021-06-08 20:58:04 -06:00 |
|
tangxifan
|
72f2742846
|
Merge pull request #325 from lnis-uofu/testbench_external_bitstream
Support flatten configuration protocol in bitstream writer and full testbench that reads external bitstream file
|
2021-06-08 09:24:16 -06:00 |
|
tangxifan
|
4aef9d5c96
|
[Tool] Remove redundant codes
|
2021-06-07 21:54:01 -06:00 |
|
tangxifan
|
d318b8ebc2
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-07 21:52:58 -06:00 |
|
tangxifan
|
462326aaa5
|
[Test] Update full testbench test case for flatten configuration protocol using 'write_full_testbench'
|
2021-06-07 21:50:00 -06:00 |
|
tangxifan
|
366dcff75d
|
[Tool] Now 'write_full_testbench' supports flatten(vanilla) configuration protocol
|
2021-06-07 21:49:31 -06:00 |
|
tangxifan
|
68f5a9dc44
|
Merge pull request #324 from lnis-uofu/testbench_external_bitstream
Support memory bank configuration protocol in bitstream writer and full testbench that reads external bitstream file
|
2021-06-07 21:18:43 -06:00 |
|
tangxifan
|
9808b61b36
|
[Tool] Bug fix on the unfit vector size of bit index register in Verilog testbench in some cases
|
2021-06-07 20:06:39 -06:00 |
|
tangxifan
|
789be124a0
|
Merge branch 'testbench_external_bitstream' of https://github.com/LNIS-Projects/OpenFPGA into testbench_external_bitstream
|
2021-06-07 19:20:39 -06:00 |
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tangxifan
|
5ecd975ec7
|
[Test] Bug fix
|
2021-06-07 19:20:10 -06:00 |
|
tangxifan
|
73fd9e2205
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-07 18:01:39 -06:00 |
|
tangxifan
|
54a53bc988
|
[Doc] Update documentation on the minor changes on bitstream file for memory bank protocol
|
2021-06-07 17:58:00 -06:00 |
|
tangxifan
|
9556f994b4
|
[Test] Use 'write_full_testbench' in all the memory bank -related test cases
|
2021-06-07 17:49:40 -06:00 |
|
tangxifan
|
ba75c18378
|
[Tool] Now 'write_full_testbench' supports memory bank configuration protocol
|
2021-06-07 17:40:07 -06:00 |
|
tangxifan
|
c680dd51ed
|
Merge pull request #323 from lnis-uofu/testbench_external_bitstream
Support frame-based configuration protocol in bitstream writer and full testbench that reads external bitstream file
|
2021-06-07 16:00:11 -06:00 |
|
tangxifan
|
1a5902ca74
|
[Tool] Bug fix in finding pruned bitstream for frame-based protocol when fast configuration is enabled
|
2021-06-07 14:32:56 -06:00 |
|
tangxifan
|
0fee741008
|
[Doc] Update documentation on the minor changes on fabric bitstream file format
|
2021-06-07 14:22:35 -06:00 |
|
tangxifan
|
732a1feaa4
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-07 14:04:47 -06:00 |
|
tangxifan
|
a67196178e
|
[Test] Now use 'write_full_testbench' in configuration frame test cases
|
2021-06-07 13:58:15 -06:00 |
|
tangxifan
|
af298de121
|
[Tool] Patch bugs in the full testbench writing using external bitstream file for frame-based configuration protocol
|
2021-06-07 13:53:32 -06:00 |
|
tangxifan
|
d644b8f22d
|
[Tool] Support external bitstream file when generating full testbench for frame-based decoder
|
2021-06-07 11:55:11 -06:00 |
|
tangxifan
|
7fb5c16b56
|
Merge pull request #321 from lnis-uofu/testbench_external_bitstream
Support fast configuration in bitstream writer and full testbench that reads external bitstream file
|
2021-06-04 21:34:51 -06:00 |
|
tangxifan
|
618b04568f
|
[Tool] Remove unnecessary new line in bitstream file
|
2021-06-04 20:07:42 -06:00 |
|
tangxifan
|
c30be6e95e
|
[Doc] Update documentation about the fast configuration for write bitstream command
|
2021-06-04 20:00:28 -06:00 |
|
tangxifan
|
cf7addb1a6
|
[Tool] Add heads to bitstream plain text file
|
2021-06-04 19:48:48 -06:00 |
|
tangxifan
|
27fa15603a
|
[Tool] Patch test case due to changes in the template script
|
2021-06-04 18:17:47 -06:00 |
|
tangxifan
|
70fb3a85dc
|
[Tool] Patch fast configuration in bitstream writing
|
2021-06-04 17:23:10 -06:00 |
|
tangxifan
|
49b971620e
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-04 16:49:41 -06:00 |
|
tangxifan
|
d98be9f87b
|
[Tool] Remove icarus requirement on vcd writing in Verilog testbenches; Since vcd writing commands are standard Verilog
|
2021-06-04 16:45:00 -06:00 |
|
tangxifan
|
6e69c2d70a
|
[Tool] Patch fast configuration in full Verilog testbench generator
|
2021-06-04 16:34:55 -06:00 |
|
tangxifan
|
e9fa44cc25
|
[Tool] Add fast configuration to the write bitstream command in example shell script
|
2021-06-04 16:24:56 -06:00 |
|
tangxifan
|
061f832429
|
[Tool] Enable fast configuration when writing fabric bitstream
|
2021-06-04 16:23:40 -06:00 |