tangxifan
372e386330
[test] add new tests to verify rr graph preloading in two file formats
2024-05-09 23:10:45 -07:00
tangxifan
b8b8fb6d3b
[test] update golden files
2024-05-07 13:25:23 -07:00
tangxifan
81730da7b2
[test] update golden files
2024-05-07 13:25:04 -07:00
tangxifan
e72d71fe28
[test] update golden outputs
2024-05-07 13:24:45 -07:00
tangxifan
deee75f828
[test] use a different W to avoid vvp collapse
2024-05-07 12:20:58 -07:00
tangxifan
7a0cd764d3
[test] fixed some bugs
2024-05-07 11:23:33 -07:00
tangxifan
13f8dd096e
[test] create a new example script for fixed routing W case
2024-05-07 10:24:15 -07:00
tangxifan
00f39d55ab
[test] now use fixed routing channel width
2024-05-06 23:32:27 -07:00
tangxifan
c334a0a792
[test] fixed a bug and add golden outputs
2024-05-02 22:07:22 -07:00
chungshien
dd577e37e0
LUTRAM Support ( #1595 )
...
* BRAM preload data - generic way to extract data from design
* Add docs and support special __layout__ case
* Add test
* Fix warning
* Change none-fabric to non-fabric
* LUTRAM Support Phase 1
* Add Test
* Add more protocol checking to enable LUTRAM feature
* Move the config setting under config protocol
* Revert any changes
---------
Co-authored-by: chungshien-chai <chungshien.chai@gmail.com>
2024-04-19 14:46:38 -07:00
tangxifan
1af8a4ae4f
[test] add golden outputs
2024-04-11 15:20:34 -07:00
tangxifan
20ba0e1dd5
[test] add new testcases to validate options of write_fabric_pin_physical_location
2024-04-11 15:06:50 -07:00
tangxifan
0c680ec426
[test] now test regex as module name for fabric pin physical location
2024-04-11 15:01:19 -07:00
tangxifan
4dedee4011
[test] add a new test case to basic reg test to validate write_fabric_pin_physical_location command
2024-04-11 12:59:13 -07:00
tangxifan
3824b006cc
[test] add new golden outputs
2024-03-29 12:06:00 -07:00
tangxifan
20386945bd
[test] add a new testcase to validate dump waveform
2024-03-29 11:53:55 -07:00
tangxifan
5c839c1858
[test] debug
2023-12-08 13:52:52 -08:00
tangxifan
99f1c5493c
[test] add a new testcase to support vcs
2023-12-08 13:45:23 -08:00
tangxifan
8e875f3453
[test] add a new test case to validate the new feature
2023-11-02 21:08:36 -07:00
tangxifan
7d83fc914c
[core] ad a new test case
2023-10-06 18:31:54 -07:00
tangxifan
5aa206e616
[core] fixed some bugs
2023-09-25 22:27:24 -07:00
tangxifan
60b8c396dc
[test] add a new test
2023-09-25 21:25:21 -07:00
tangxifan
663c9c9fa1
[test] add a new test to validate the tile port merge feature
2023-09-25 18:34:34 -07:00
tangxifan
a1ed277a88
[test] typo
2023-09-23 15:12:02 -07:00
tangxifan
00e1a5df11
[test] fixed some bugs
2023-09-23 12:44:47 -07:00
tangxifan
195aa7a9a8
[test] developing new test to increase coverage on module renaming
2023-09-23 12:40:20 -07:00
tangxifan
f3279bd885
[test] now use 4x4 fabric to check the using index netlists
2023-09-20 22:49:47 -07:00
tangxifan
eeb1bd6662
[core] fixed some bugs
2023-09-17 23:16:15 -07:00
tangxifan
3fd60a165d
[test] typo
2023-09-17 17:42:15 -07:00
tangxifan
11e976ec92
[test] add a new test to validate renaming on fpga top/core modules
2023-09-17 17:38:37 -07:00
tangxifan
0ef1e0bde5
[test] add a new test to validate renaming rules
2023-09-17 13:29:12 -07:00
tangxifan
559fa45d89
[test] add a new test to validate module renaming using index
2023-09-16 17:55:52 -07:00
tangxifan
1287097ce5
[test] update golden netlists
2023-09-06 22:51:38 -07:00
tangxifan
401f8098a6
[test] update golden copies
2023-09-06 17:35:03 -07:00
tangxifan
db0bb291c2
[test] update settings
2023-08-22 15:22:48 -07:00
tangxifan
56cedf6c8b
[test] added a new test case to validate the support on different wire segment distribution on X and Y
2023-08-22 11:20:14 -07:00
tangxifan
1b132fd667
[test] add a new testcase to validate the support on different routing channel width on X and Y
2023-08-22 11:06:12 -07:00
tangxifan
15a8d8a76a
[test] added a new test to validate combo: group_tile, group_config_block, io subtile, tile annotation
2023-08-18 21:59:06 -07:00
tangxifan
5f6050d404
[test] add a new test to validate combo: group tile, tile annotation and subtile
2023-08-18 21:48:40 -07:00
tangxifan
5ac8919ce0
[test] add a new testcase to validate subtile with tile annotations
2023-08-18 21:37:15 -07:00
tangxifan
e82e4f487e
[test] add a new test to validate io subtile support
2023-08-18 11:13:34 -07:00
tangxifan
3ac3eb4624
[test] adding more flavor to the L shape
2023-08-17 15:08:27 -07:00
tangxifan
85bc890009
[test] add a new test to validate comb options of group tile, group config block and L shape fabric
2023-08-17 14:52:30 -07:00
tangxifan
2f49c25f09
[test] updated
2023-08-11 21:19:06 -07:00
tangxifan
b155e660ee
[test] fixed a bug
2023-08-11 16:55:35 -07:00
tangxifan
253d5fa26c
[core] a new test to validate the L shape in homo geneous fpga
2023-08-11 13:05:46 -07:00
tangxifan
dc0eec8b81
[test] added a new test to validate L shapre
2023-08-11 12:49:38 -07:00
tangxifan
0e9cf6e909
[test] added a new testcase to validate heterogeneous fpga using group config block
2023-08-06 22:11:38 -07:00
tangxifan
3e33f262bc
[test] added a new test to validate group_config_block support when fpga_core wrapper is enabled
2023-08-06 18:59:24 -07:00
tangxifan
46b1de08c6
[test] fixed a bug
2023-08-05 22:07:46 -07:00