tangxifan
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15a8d8a76a
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[test] added a new test to validate combo: group_tile, group_config_block, io subtile, tile annotation
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2023-08-18 21:59:06 -07:00 |
tangxifan
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5f6050d404
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[test] add a new test to validate combo: group tile, tile annotation and subtile
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2023-08-18 21:48:40 -07:00 |
tangxifan
|
e4c5265b68
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[test] arch syntax
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2023-08-18 21:40:56 -07:00 |
tangxifan
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5ac8919ce0
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[test] add a new testcase to validate subtile with tile annotations
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2023-08-18 21:37:15 -07:00 |
tangxifan
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f69520d0c3
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[arch] format
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2023-08-18 11:15:25 -07:00 |
tangxifan
|
170a49c34f
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[test] fix a bug in arch file
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2023-08-18 11:15:05 -07:00 |
tangxifan
|
e82e4f487e
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[test] add a new test to validate io subtile support
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2023-08-18 11:13:34 -07:00 |
tangxifan
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4afd48d930
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[test] format
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2023-08-17 15:33:09 -07:00 |
tangxifan
|
463897f78e
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[test] fixed a bug in arch
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2023-08-17 15:28:59 -07:00 |
tangxifan
|
3ac3eb4624
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[test] adding more flavor to the L shape
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2023-08-17 15:08:27 -07:00 |
tangxifan
|
913c232556
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[test] deploy new test to basic reg test
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2023-08-17 14:54:24 -07:00 |
tangxifan
|
85bc890009
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[test] add a new test to validate comb options of group tile, group config block and L shape fabric
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2023-08-17 14:52:30 -07:00 |
tangxifan
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2f49c25f09
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[test] updated
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2023-08-11 21:19:06 -07:00 |
tangxifan
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b155e660ee
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[test] fixed a bug
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2023-08-11 16:55:35 -07:00 |
tangxifan
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16f102f4c1
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[test] deploy new tests to basic regression tests
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2023-08-11 13:07:41 -07:00 |
tangxifan
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253d5fa26c
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[core] a new test to validate the L shape in homo geneous fpga
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2023-08-11 13:05:46 -07:00 |
tangxifan
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dc0eec8b81
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[test] added a new test to validate L shapre
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2023-08-11 12:49:38 -07:00 |
tangxifan
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0e9cf6e909
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[test] added a new testcase to validate heterogeneous fpga using group config block
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2023-08-06 22:11:38 -07:00 |
tangxifan
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3e33f262bc
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[test] added a new test to validate group_config_block support when fpga_core wrapper is enabled
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2023-08-06 18:59:24 -07:00 |
tangxifan
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46b1de08c6
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[test] fixed a bug
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2023-08-05 22:07:46 -07:00 |
tangxifan
|
b7048d3dc8
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[test] adding new tests to validate group config block
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2023-08-03 22:30:41 -07:00 |
tangxifan
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667c5f8944
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[test] fixed a bug on the testcase
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2023-07-27 22:02:28 -07:00 |
tangxifan
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952e84fce1
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[test] now heterogeneous testcases for tile modules pass
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2023-07-27 20:30:32 -07:00 |
tangxifan
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beaa687a20
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[core] fixed bugs on supporting heterogeneous blocks in tile modules
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2023-07-27 20:29:18 -07:00 |
tangxifan
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3d56bd0ff2
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[test] deploy the new test to ci
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2023-07-27 17:03:55 -07:00 |
tangxifan
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65995d7c13
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[test] add a new testcase to validate the heterogeneous fpga fabric when using tile modules
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2023-07-27 17:03:02 -07:00 |
tangxifan
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46e58a56cb
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[test] added a new test case to validate clock network when using the tile modules
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2023-07-27 16:39:48 -07:00 |
tangxifan
|
81d699a723
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[test] added a new testcase to validate carry chain connections in tile modules
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2023-07-27 16:18:30 -07:00 |
tangxifan
|
e9f2adf3f9
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[test] add a new testcase to validate carry chain connections when using tile modules
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2023-07-27 16:06:43 -07:00 |
tangxifan
|
1ea8a33d4b
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[test] add a new testcase to validate global tile connections on tile modules
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2023-07-27 15:57:38 -07:00 |
tangxifan
|
a2848940df
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[test] add a new testcase to ease debugging
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2023-07-26 22:32:03 -07:00 |
tangxifan
|
5685fbd5e8
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[test] adding a new test case to validate the tile modules on 4x4 fabric
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2023-07-26 22:17:39 -07:00 |
tangxifan
|
bb837f4f79
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[test] update golden netlists
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2023-07-25 23:39:59 -07:00 |
tangxifan
|
0db4ef62e8
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[test] add a new test for tile-based fabric: using preconfig testbenches
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2023-07-25 15:48:14 -07:00 |
tangxifan
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523cf83cc9
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[test] disable pnr writer in test cases
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2023-07-25 15:39:25 -07:00 |
tangxifan
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82fe63297a
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[test] add a new test for top-left tile grouping
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2023-07-19 11:22:36 -07:00 |
tangxifan
|
930d98f2af
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[test] deploy new tests
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2023-07-08 21:52:16 -07:00 |
tangxifan
|
124514c80e
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[test] update fabric key to new syntax
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2023-07-08 18:26:05 -07:00 |
tangxifan
|
51e1547634
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[test] hotfix
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2023-06-26 15:32:16 -07:00 |
tangxifan
|
270d6f933b
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[test] add a new testcase to validate mock wrapper
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2023-06-26 15:26:50 -07:00 |
tangxifan
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919d6d8608
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[test] added more testcases to validate the dut module option; fixing bugs on preconfigured testbenches
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2023-06-25 22:49:51 -07:00 |
tangxifan
|
523e338d53
|
[test] debugging
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2023-06-23 14:49:52 -07:00 |
tangxifan
|
962ba67e36
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[test] adding new tests to validate fpga core wrapper naming rules
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2023-06-23 14:47:21 -07:00 |
tangxifan
|
84edd41342
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[test] fixed the bug in adder mapping
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2023-06-20 17:09:31 -07:00 |
tangxifan
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dba48fb171
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[test] reworking adder mapping flow to validate carry chain mapping
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2023-06-20 16:57:08 -07:00 |
tangxifan
|
fd8f371d85
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[test] add missing file
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2023-06-19 16:44:11 -07:00 |
tangxifan
|
efc9bf9907
|
[test] added new test case to validate bitstream generation
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2023-06-19 12:40:37 -07:00 |
tangxifan
|
97b089ae3c
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[test] added new testcases to validate fpga core wrapper
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2023-06-18 21:01:37 -07:00 |
tangxifan
|
1ef8eed589
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[test] update no time stamp golden outputs
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2023-06-08 15:38:15 -07:00 |
tangxifan
|
ac31a20376
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[test] now bypass clock routing in default example
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2023-06-08 13:44:22 -07:00 |