tangxifan
|
b6f96e5a8f
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add method functions to pb_type annotation
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2020-01-25 20:46:21 -07:00 |
|
tangxifan
|
b4f4bf62a2
|
add comments to sample arch
|
2020-01-25 17:42:24 -07:00 |
|
tangxifan
|
7feeee8c0e
|
add full syntax to sample_arch.xml about the physical pb_type binding
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2020-01-25 17:38:06 -07:00 |
|
tangxifan
|
cdb3b6de46
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add read_openfpga_arch to OpenFPGA shell
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2020-01-23 19:10:53 -07:00 |
|
tangxifan
|
16752b7e39
|
update on sample arch
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2020-01-20 12:42:08 -07:00 |
|
tangxifan
|
07994d424c
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add XML parser and writer for direct connection
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2020-01-19 15:00:19 -07:00 |
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tangxifan
|
10336cbe67
|
add XML parser and writer for routing circuit definition for OpenFPGA architecture
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2020-01-19 14:44:27 -07:00 |
|
tangxifan
|
ebe46d15a9
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add XML parser, writer and linker for configuration protocol data structure
|
2020-01-18 21:19:20 -07:00 |
|
tangxifan
|
9693c3a12d
|
add XML writer for simulation setting object
|
2020-01-18 16:41:42 -07:00 |
|
tangxifan
|
bc3130d196
|
add XML parser for simulation setting
|
2020-01-18 15:40:20 -07:00 |
|
tangxifan
|
0de9908d52
|
add accessors to simulation setting data structure
|
2020-01-18 12:51:25 -07:00 |
|
tangxifan
|
7a46c85cb0
|
reorganize and clean-up sample architecture
|
2020-01-18 10:50:15 -07:00 |
|
tangxifan
|
ab1b1b7e02
|
add XML writer for technology library
|
2020-01-17 20:02:56 -07:00 |
|
tangxifan
|
8f2936af54
|
finish XML parser for technology library
|
2020-01-17 17:43:55 -07:00 |
|
tangxifan
|
d58186507c
|
add XML parsing for device model library settings
|
2020-01-17 17:15:58 -07:00 |
|
tangxifan
|
88a96673e3
|
rename some methods in technology library and start building associated XML parser
|
2020-01-17 16:44:57 -07:00 |
|
tangxifan
|
771f2d9c37
|
developing data structure TechnologyLibrary to store technology-related information
|
2020-01-17 10:17:15 -07:00 |
|
tangxifan
|
aa070b2a41
|
further clean-up sample arch.xml
|
2020-01-17 09:38:35 -07:00 |
|
tangxifan
|
910c69d7e5
|
clean up and reorganize XML about technology library
|
2020-01-17 09:24:58 -07:00 |
|
tangxifan
|
5c69f57559
|
sample_arch:move cmos/rram variation to technology library XML nodes
|
2020-01-16 20:58:45 -07:00 |
|
tangxifan
|
95edd3c091
|
clean up the sample arch
|
2020-01-16 20:52:47 -07:00 |
|
tangxifan
|
9ba42cd540
|
add XML writer for circuit ports
|
2020-01-16 16:05:11 -07:00 |
|
tangxifan
|
0304d723c0
|
add XML writer for design technology of a circuit model
|
2020-01-16 14:45:41 -07:00 |
|
tangxifan
|
e282f813bc
|
rename circuit settings to openfpga arch and update sample architecture
|
2020-01-15 20:28:04 -07:00 |
|
tangxifan
|
602d0bde4c
|
add XML parsing for wire parasitics in circuit model
|
2020-01-15 19:54:57 -07:00 |
|
tangxifan
|
a9b122d584
|
add XML parsing for buffer models in circuit library
|
2020-01-15 15:27:49 -07:00 |
|
tangxifan
|
5937ffc809
|
add XML parsing for buffer/pass-gate-logic -related properties
|
2020-01-14 15:44:24 -07:00 |
|
tangxifan
|
56113e1aab
|
adding XML parsing for design tech of circuit model
|
2020-01-14 14:10:00 -07:00 |
|
tangxifan
|
82d83ddceb
|
reorganized the read XML openfpga arch
|
2020-01-14 08:33:48 -07:00 |
|
tangxifan
|
e2f641fdb3
|
add example architecture for openfpga and developing XML parser
|
2020-01-12 22:39:38 -07:00 |