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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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3 Commits
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tangxifan
e223868df8
fix bugs for wired LUTs
2018-11-27 12:46:30 -07:00
tangxifan
861c449606
support wired LUT in FPGA-SPICE and FPGA-Verilog
2018-11-15 15:57:49 -07:00
tangxifan
d683134b12
rename customized vpr7 to vpr7 XML to Production
2018-09-17 23:10:45 -06:00