github-actions[bot]
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059b449314
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Updated Patch Count
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2024-08-14 19:40:46 +00:00 |
tangxifan
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89e70888ed
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Merge pull request #1794 from lnis-uofu/xt_pbfixup
support global net fixup in pb pin fixup
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2024-08-14 12:40:28 -07:00 |
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tangxifan
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fc06aacc4e
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[core] code format
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2024-08-14 10:49:36 -07:00 |
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tangxifan
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665777df51
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[core] fixed some bug
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2024-08-14 10:49:12 -07:00 |
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tangxifan
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84cc7090ce
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[test] add a new test to validate that pb pin fixup impacts global net now
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2024-08-14 10:37:46 -07:00 |
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tangxifan
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76e03e3e14
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[core] code format
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2024-08-13 23:25:04 -07:00 |
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tangxifan
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735adab9df
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[core] syntax due to clang
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2024-08-13 23:24:28 -07:00 |
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tangxifan
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eb7639f44b
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[core] code format
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2024-08-13 22:37:34 -07:00 |
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tangxifan
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812686d169
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[core] support global net fixup in pb pin fixup
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2024-08-13 22:36:37 -07:00 |
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tangxifan
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ba5994a14c
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[core] more debugging messages
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2024-08-13 21:03:49 -07:00 |
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tangxifan
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36cb1cef93
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Merge pull request #1793 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-13 21:03:28 -07:00 |
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github-actions[bot]
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b5619fef42
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Updated Patch Count
|
2024-08-14 04:02:35 +00:00 |
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tangxifan
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df71e48b15
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Merge pull request #1792 from lnis-uofu/xt_pbfixup
[core] fixed a bug where unused last-level of clock spines are not disabled
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2024-08-13 21:02:17 -07:00 |
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tangxifan
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c2d9696489
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[core] fixed a bug where some spines are not disabled
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2024-08-13 15:19:47 -07:00 |
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tangxifan
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ad13058a0b
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[core] fixed a bug where unused last-level of clock spines are not disabled
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2024-08-13 15:04:13 -07:00 |
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tangxifan
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25bcdee764
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Merge pull request #1791 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-13 10:36:42 -07:00 |
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github-actions[bot]
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b7bff97454
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Updated Patch Count
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2024-08-13 17:35:26 +00:00 |
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tangxifan
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9d2cb9d21d
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Merge pull request #1790 from lnis-uofu/dependabot/submodules/yosys-4b9f452
Bump yosys from `77b2ae2` to `4b9f452`
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2024-08-13 10:34:58 -07:00 |
dependabot[bot]
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489a2a3768
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Bump yosys from `77b2ae2` to `4b9f452`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `77b2ae2` to `4b9f452`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](77b2ae2e39...4b9f452735)
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
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2024-08-13 06:50:34 +00:00 |
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tangxifan
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7a8b016e6d
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Merge pull request #1789 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-09 20:24:58 -07:00 |
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github-actions[bot]
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d06b18d8f4
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Updated Patch Count
|
2024-08-10 03:24:29 +00:00 |
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tangxifan
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c8d9f489a2
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Merge pull request #1788 from lnis-uofu/xt_clkntwk
Fixed a bug where clock network taps cannot identify subtiles
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2024-08-09 20:24:05 -07:00 |
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tangxifan
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542571ce89
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[test] code format
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2024-08-09 18:20:27 -07:00 |
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tangxifan
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4def678b11
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[core] code format
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2024-08-09 18:20:18 -07:00 |
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tangxifan
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e7ab7a61f1
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[doc] update to use tile name and index when defining clock taps
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2024-08-09 18:09:12 -07:00 |
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tangxifan
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1af1306444
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[core] fixed a bug where pin index for subtile is wrongly calculated for clock network taps
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2024-08-09 18:02:49 -07:00 |
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tangxifan
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f1ab44a212
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[core] fixed a bug
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2024-08-09 17:10:58 -07:00 |
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tangxifan
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c6246ae905
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[test] typo
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2024-08-09 17:10:51 -07:00 |
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tangxifan
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a05bfb55dd
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[test] typo
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2024-08-09 17:05:48 -07:00 |
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tangxifan
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38f1bdba4e
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[test] add a new test case
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2024-08-09 17:04:10 -07:00 |
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tangxifan
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602ab72002
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[test] add associated openfpga arch
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2024-08-09 17:01:23 -07:00 |
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tangxifan
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e6c508f081
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[test] add a new arch to validate that clock network tap supports subtiles
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2024-08-09 16:51:34 -07:00 |
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tangxifan
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e4d7192e50
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[core] fixed a bug where subtile was used for clock network tap name
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2024-08-09 16:16:05 -07:00 |
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tangxifan
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a4091efc79
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Merge pull request #1786 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-08 10:02:51 -07:00 |
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github-actions[bot]
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dc680c85a7
|
Updated Patch Count
|
2024-08-08 17:00:24 +00:00 |
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tangxifan
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c400e2f92c
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Merge pull request #1785 from lnis-uofu/dependabot/submodules/yosys-77b2ae2
Bump yosys from `669f8b1` to `77b2ae2`
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2024-08-08 10:00:03 -07:00 |
Lin
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755959a890
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add cb cx write function
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2024-08-08 02:54:02 -07:00 |
|
Lin
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e45619b22d
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write sb
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2024-08-08 01:00:35 -07:00 |
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dependabot[bot]
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5cffc18ba7
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Bump yosys from `669f8b1` to `77b2ae2`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `669f8b1` to `77b2ae2`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](669f8b18f0...77b2ae2e39)
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-08-08 06:18:11 +00:00 |
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tangxifan
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7c3830f743
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Merge pull request #1784 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-07 10:31:28 -07:00 |
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github-actions[bot]
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2dfbb4fc28
|
Updated Patch Count
|
2024-08-07 17:19:10 +00:00 |
|
tangxifan
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bdf71282c8
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Merge pull request #1783 from lnis-uofu/dependabot/submodules/yosys-669f8b1
Bump yosys from `d2b5788` to `669f8b1`
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2024-08-07 10:18:47 -07:00 |
|
Lin
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9c67950a75
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preload functions
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2024-08-07 03:20:45 -07:00 |
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dependabot[bot]
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c8839b0304
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Bump yosys from `d2b5788` to `669f8b1`
Bumps [yosys](https://github.com/YosysHQ/yosys) from `d2b5788` to `669f8b1`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](d2b5788674...669f8b18f0)
---
updated-dependencies:
- dependency-name: yosys
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-08-07 06:04:30 +00:00 |
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tangxifan
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b04252c2f3
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Merge pull request #1782 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2024-08-06 22:41:39 -07:00 |
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github-actions[bot]
|
d4487e9fec
|
Updated Patch Count
|
2024-08-07 05:39:32 +00:00 |
|
tangxifan
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1e6e0442ee
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Merge pull request #1781 from lnis-uofu/xt_rpt_ref
Rework the option ``constant_undriven_wire``
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2024-08-06 22:39:12 -07:00 |
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tangxifan
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1026df4890
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[test] add new tests to validate the options for undriven inputs in verilog netlists
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2024-08-06 20:58:00 -07:00 |
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tangxifan
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1d5acea7e0
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[core] typo
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2024-08-06 20:17:15 -07:00 |
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tangxifan
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1225679aac
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[core] code format
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2024-08-06 17:35:44 -07:00 |