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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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3 Commits
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Lalit Sharma
ea4aee8cb2
For time-being yosys script running in no_adder mode.
2021-02-28 22:07:23 -08:00
Lalit Sharma
0038496d9c
Replacing -openfpga with -family qlf_k4n8
2021-02-28 21:08:47 -08:00
Lalit Sharma
1082d3c677
Renaming file qlf_k4n8_yosys.ys to qlf_yosys.ys
2021-02-25 23:39:07 -08:00