tangxifan
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56113e1aab
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adding XML parsing for design tech of circuit model
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2020-01-14 14:10:00 -07:00 |
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tangxifan
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2692d0fc35
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adding XML parsing for SPICE and Verilog netlist for each circuit model
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2020-01-14 08:45:27 -07:00 |
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tangxifan
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82d83ddceb
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reorganized the read XML openfpga arch
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2020-01-14 08:33:48 -07:00 |
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tangxifan
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ca3ca14cc7
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fixed bugs in XML when parsing circuit model types
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2020-01-13 21:52:13 -07:00 |
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tangxifan
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db503ffebf
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add openfpga read xml executable and start min unit test
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2020-01-13 21:05:58 -07:00 |
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tangxifan
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d6c69ea7c6
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developing XML parser for circuit model name and type
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2020-01-12 23:45:51 -07:00 |
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tangxifan
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e2f641fdb3
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add example architecture for openfpga and developing XML parser
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2020-01-12 22:39:38 -07:00 |
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tangxifan
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2e986608ba
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initial commit on parser for reading openfpga arch xml
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2020-01-12 21:33:28 -07:00 |
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tangxifan
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5dea648be6
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add missing CMakeList for libarchopenfpga
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2020-01-12 18:15:36 -07:00 |
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tangxifan
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48ecb6e48b
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immigrate XML parser for circuit_lib to library readarchopenfpga
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2020-01-12 18:11:00 -07:00 |