tangxifan
|
bb8ef9614f
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change to namespace openfpga and bug fixed to avoid easy crash due to wrong options
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2020-01-22 16:49:32 -07:00 |
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tangxifan
|
f8c5c1a117
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update shell with new function binding strategy and new help desk print-out
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2020-01-22 16:05:14 -07:00 |
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tangxifan
|
7073e4d082
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add shell unit test
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2020-01-21 22:59:53 -07:00 |
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tangxifan
|
4f26e2519f
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add shell interface and command execution
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2020-01-21 20:46:24 -07:00 |
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tangxifan
|
363ab382e5
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add shell data structure
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2020-01-21 17:24:49 -07:00 |
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tangxifan
|
b53897b838
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add how-to-use for command data structure
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2020-01-20 22:53:11 -07:00 |
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tangxifan
|
7a5b36fe52
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Add echo command and unit test for command parser
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2020-01-20 20:31:16 -07:00 |
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tangxifan
|
3ae80a192f
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add command echo functionality for mini shell
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2020-01-20 19:42:43 -07:00 |
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tangxifan
|
acdb3818c2
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start developing mini shell for open fpga
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2020-01-20 18:14:24 -07:00 |
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tangxifan
|
16752b7e39
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update on sample arch
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2020-01-20 12:42:08 -07:00 |
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tangxifan
|
07994d424c
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add XML parser and writer for direct connection
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2020-01-19 15:00:19 -07:00 |
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tangxifan
|
10336cbe67
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add XML parser and writer for routing circuit definition for OpenFPGA architecture
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2020-01-19 14:44:27 -07:00 |
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tangxifan
|
ebe46d15a9
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add XML parser, writer and linker for configuration protocol data structure
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2020-01-18 21:19:20 -07:00 |
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tangxifan
|
9693c3a12d
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add XML writer for simulation setting object
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2020-01-18 16:41:42 -07:00 |
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tangxifan
|
bc3130d196
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add XML parser for simulation setting
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2020-01-18 15:40:20 -07:00 |
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tangxifan
|
2a902c7e55
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add mutators to simulation setting data structure
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2020-01-18 14:07:37 -07:00 |
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tangxifan
|
0de9908d52
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add accessors to simulation setting data structure
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2020-01-18 12:51:25 -07:00 |
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tangxifan
|
7a46c85cb0
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reorganize and clean-up sample architecture
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2020-01-18 10:50:15 -07:00 |
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tangxifan
|
ab1b1b7e02
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add XML writer for technology library
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2020-01-17 20:02:56 -07:00 |
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tangxifan
|
8f2936af54
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finish XML parser for technology library
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2020-01-17 17:43:55 -07:00 |
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tangxifan
|
e54760c677
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add XML parsing for transistors and RRAM parameters in technology library
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2020-01-17 17:32:42 -07:00 |
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tangxifan
|
d48a888804
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add XML parsing for design parameters in technology library
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2020-01-17 17:22:09 -07:00 |
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tangxifan
|
de0bcc96fb
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add missing file about XML parsers for technology library
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2020-01-17 17:16:32 -07:00 |
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tangxifan
|
d58186507c
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add XML parsing for device model library settings
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2020-01-17 17:15:58 -07:00 |
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tangxifan
|
88a96673e3
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rename some methods in technology library and start building associated XML parser
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2020-01-17 16:44:57 -07:00 |
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tangxifan
|
d4b5171fa2
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add comments to technology library
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2020-01-17 15:31:44 -07:00 |
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tangxifan
|
313922f03f
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add internal linker to technology library
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2020-01-17 15:04:00 -07:00 |
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tangxifan
|
edaaa00c1d
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added mutators for technology library
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2020-01-17 14:46:09 -07:00 |
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tangxifan
|
6b703a4fc5
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add accessors to technology library data structure
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2020-01-17 13:34:32 -07:00 |
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tangxifan
|
771f2d9c37
|
developing data structure TechnologyLibrary to store technology-related information
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2020-01-17 10:17:15 -07:00 |
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tangxifan
|
aa070b2a41
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further clean-up sample arch.xml
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2020-01-17 09:38:35 -07:00 |
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tangxifan
|
910c69d7e5
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clean up and reorganize XML about technology library
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2020-01-17 09:24:58 -07:00 |
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tangxifan
|
5c69f57559
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sample_arch:move cmos/rram variation to technology library XML nodes
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2020-01-16 20:58:45 -07:00 |
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tangxifan
|
95edd3c091
|
clean up the sample arch
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2020-01-16 20:52:47 -07:00 |
|
tangxifan
|
a598929fe7
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add circuit library checker in the test
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2020-01-16 20:25:00 -07:00 |
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tangxifan
|
f7a7c56366
|
move OpenFPGAArch to openfpga namespace
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2020-01-16 20:22:56 -07:00 |
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tangxifan
|
d6adfa0821
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add XML parsing for delay matrix and wire parasitics for circuit library
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2020-01-16 20:14:39 -07:00 |
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tangxifan
|
2e0ce78054
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add XML writing for buffers in circuit library
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2020-01-16 17:21:41 -07:00 |
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tangxifan
|
9ba42cd540
|
add XML writer for circuit ports
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2020-01-16 16:05:11 -07:00 |
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tangxifan
|
0304d723c0
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add XML writer for design technology of a circuit model
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2020-01-16 14:45:41 -07:00 |
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tangxifan
|
3ace7f8ef7
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move generic data structures to openfpgautil library
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2020-01-16 13:26:55 -07:00 |
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tangxifan
|
d232391250
|
developed XML writer for circuit library and start porting functions to openfpgautil library
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2020-01-16 12:32:29 -07:00 |
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tangxifan
|
e282f813bc
|
rename circuit settings to openfpga arch and update sample architecture
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2020-01-15 20:28:04 -07:00 |
|
tangxifan
|
264dc8458d
|
add XML parsing for delay matrix in circuit model
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2020-01-15 20:21:53 -07:00 |
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tangxifan
|
602d0bde4c
|
add XML parsing for wire parasitics in circuit model
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2020-01-15 19:54:57 -07:00 |
|
tangxifan
|
999c364b25
|
added XML parsing for circuit model ports
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2020-01-15 17:29:49 -07:00 |
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tangxifan
|
c20e1d48d2
|
added XML parsing for pass-gate-logic in circuit models
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2020-01-15 15:49:02 -07:00 |
|
tangxifan
|
a9b122d584
|
add XML parsing for buffer models in circuit library
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2020-01-15 15:27:49 -07:00 |
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tangxifan
|
35d6c9661b
|
Finish the first version of XML parser for design technology of circuit models
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2020-01-14 16:24:27 -07:00 |
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tangxifan
|
5937ffc809
|
add XML parsing for buffer/pass-gate-logic -related properties
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2020-01-14 15:44:24 -07:00 |
|
tangxifan
|
56113e1aab
|
adding XML parsing for design tech of circuit model
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2020-01-14 14:10:00 -07:00 |
|
tangxifan
|
2692d0fc35
|
adding XML parsing for SPICE and Verilog netlist for each circuit model
|
2020-01-14 08:45:27 -07:00 |
|
tangxifan
|
82d83ddceb
|
reorganized the read XML openfpga arch
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2020-01-14 08:33:48 -07:00 |
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tangxifan
|
ca3ca14cc7
|
fixed bugs in XML when parsing circuit model types
|
2020-01-13 21:52:13 -07:00 |
|
tangxifan
|
db503ffebf
|
add openfpga read xml executable and start min unit test
|
2020-01-13 21:05:58 -07:00 |
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tangxifan
|
d6c69ea7c6
|
developing XML parser for circuit model name and type
|
2020-01-12 23:45:51 -07:00 |
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tangxifan
|
e2f641fdb3
|
add example architecture for openfpga and developing XML parser
|
2020-01-12 22:39:38 -07:00 |
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tangxifan
|
2e986608ba
|
initial commit on parser for reading openfpga arch xml
|
2020-01-12 21:33:28 -07:00 |
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tangxifan
|
5dea648be6
|
add missing CMakeList for libarchopenfpga
|
2020-01-12 18:15:36 -07:00 |
|
tangxifan
|
48ecb6e48b
|
immigrate XML parser for circuit_lib to library readarchopenfpga
|
2020-01-12 18:11:00 -07:00 |