4 Commits

Author	SHA1	Message	Date
tangxifan	861c449606	support wired LUT in FPGA-SPICE and FPGA-Verilog	2018-11-15 15:57:49 -07:00
tangxifan	c67ba5f58a	clean up codes	2018-09-27 14:26:08 -06:00
tangxifan	681cca99a4	fix a bug in tapbuf	2018-09-21 19:00:22 -06:00
tangxifan	d683134b12	rename customized vpr7 to vpr7 XML to Production	2018-09-17 23:10:45 -06:00