tangxifan
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352c97302b
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start building object GSB graph
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2019-06-17 22:10:30 -06:00 |
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tangxifan
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f4191315da
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use rr_gsb to build edges of rr_graph
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2019-06-17 18:01:45 -06:00 |
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tangxifan
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51ff150a77
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bug fixing in tileable rr_graph generator
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2019-06-17 10:16:08 -06:00 |
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tangxifan
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0d14fef53e
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bug fixing in setting CHANX and CHANY nodes in tileable rr_graph generator
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2019-06-16 23:02:18 -06:00 |
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tangxifan
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1af3b5ef55
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set chan_rr_nodes in tileable rr_graph builder
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2019-06-16 14:23:19 -06:00 |
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tangxifan
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8c9cc003ea
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developing routing track rr_node set up in tileable routing architecture
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2019-06-15 18:11:08 -06:00 |
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tangxifan
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d3296d0975
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developing tileable rr_graph builder
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2019-06-14 22:35:42 -06:00 |
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tangxifan
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a33627606e
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developing tileable routing track arrangement
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2019-06-14 17:35:40 -06:00 |
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tangxifan
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44d21ebb90
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fixed a bug in Verilog generator supporting SRAM5T
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2019-06-13 14:42:39 -06:00 |
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tangxifan
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5ae4dec0af
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fix bugs in CMakeList on enable/disable VPR Graphics
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2019-06-12 22:48:00 -06:00 |
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tangxifan
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1d00e3665b
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start developing tileable_rr_graph_builder
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2019-06-11 16:50:40 -06:00 |