This website requires JavaScript.
Explore
Help
Sign In
riscv
/
OpenFPGA
mirror of
https://github.com/lnis-uofu/OpenFPGA.git
Watch
1
Star
0
Fork
You've already forked OpenFPGA
0
Code
Issues
Projects
Releases
Wiki
Activity
146
Commits
70
Branches
8
Tags
105
MiB
75d64db0f9
Commit Graph
3 Commits
Author
SHA1
Message
Date
tangxifan
e223868df8
fix bugs for wired LUTs
2018-11-27 12:46:30 -07:00
tangxifan
861c449606
support wired LUT in FPGA-SPICE and FPGA-Verilog
2018-11-15 15:57:49 -07:00
tangxifan
d683134b12
rename customized vpr7 to vpr7 XML to Production
2018-09-17 23:10:45 -06:00