tangxifan
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95d7a17b3c
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Merge branch 'master' into vtr_upgrade
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2022-09-09 14:32:42 -07:00 |
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tangxifan
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390c0526b5
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Merge pull request #777 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2022-09-09 12:20:48 -07:00 |
github-actions[bot]
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9632934ab1
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Updated Patch Count
|
2022-09-09 19:19:21 +00:00 |
|
tangxifan
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f2a311aecf
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Merge pull request #775 from lnis-uofu/subtile_syntax
Subtile syntax
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2022-09-08 18:43:15 -07:00 |
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tangxifan
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0609210b39
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[doc] update doc with the new xml syntax
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2022-09-08 17:00:16 -07:00 |
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tangxifan
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d4523e819c
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[test] fixed a bug
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2022-09-08 16:55:50 -07:00 |
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tangxifan
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419a3a1e46
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[arch] fixed a bug
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2022-09-08 16:53:52 -07:00 |
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tangxifan
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7fe240e199
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[vpr] fixed a bug when parsing conventional pin loc
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2022-09-08 16:53:00 -07:00 |
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tangxifan
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122a323668
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[arch] fixed bugs
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2022-09-08 16:50:33 -07:00 |
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tangxifan
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765712a263
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[vpr] fixed a bug when parsing instances
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2022-09-08 16:47:28 -07:00 |
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tangxifan
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d76f3e3b6c
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[test] fixed the bug
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2022-09-08 16:34:23 -07:00 |
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tangxifan
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218e6d0a47
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[arch] fixed syntax errors
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2022-09-08 16:31:52 -07:00 |
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tangxifan
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a840aeea7a
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[test] add a new test to validate custom I/O location syntax and deploy to basic regression tests
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2022-09-08 16:27:11 -07:00 |
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tangxifan
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b1fad0b4e5
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[arch] add an example architecture to show the use extended syntax
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2022-09-08 16:19:21 -07:00 |
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tangxifan
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c71b533e9f
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[vpr] syntax
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2022-09-08 16:04:25 -07:00 |
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tangxifan
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b943d79092
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[vpr] now support the definition of subtile in custom pin location, such io[3:4].a2f[0:0]
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2022-09-08 15:57:08 -07:00 |
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tangxifan
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cd112ce703
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Merge branch 'master' into vtr_upgrade
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2022-09-08 09:25:37 -07:00 |
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tangxifan
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1073c3306b
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Merge pull request #770 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2022-09-07 17:05:00 -07:00 |
|
github-actions[bot]
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89d5119c01
|
Updated Patch Count
|
2022-09-08 00:03:40 +00:00 |
|
tangxifan
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f74f1a6603
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[engine] update vtr
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2022-09-07 16:24:03 -07:00 |
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tangxifan
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148bf5e830
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[engine] update vtr
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2022-09-07 16:20:13 -07:00 |
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tangxifan
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e5c7a3df9f
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[engine] syntax
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2022-09-07 15:51:54 -07:00 |
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tangxifan
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a81de4efed
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[engine] update vtr
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2022-09-07 15:10:17 -07:00 |
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tangxifan
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56619f9a47
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Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
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2022-09-07 15:04:05 -07:00 |
Ganesh Gore
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65d7f592c9
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Merge pull request #766 from lnis-uofu/rr_gsb_mirror
Now switch_id is no longer a metric to fail GSB mirrorable functions but circuit model is.
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2022-09-06 22:58:37 -06:00 |
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tangxifan
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3e4bc985fe
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Merge branch 'rr_gsb_mirror' of github.com:lnis-uofu/OpenFPGA into rr_gsb_mirror
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2022-09-07 11:57:15 +08:00 |
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tangxifan
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8d09773e65
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[engine] remove unnecessary checks from sb mirror checker
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2022-09-07 11:55:08 +08:00 |
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tangxifan
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5a47f00708
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Merge branch 'master' into rr_gsb_mirror
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2022-09-06 20:21:03 -07:00 |
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tangxifan
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164a788ca3
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Merge pull request #768 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2022-09-06 18:08:57 -07:00 |
|
github-actions[bot]
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8382416931
|
Updated Patch Count
|
2022-09-07 00:15:01 +00:00 |
|
tangxifan
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b7acd6aabc
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Merge branch 'master' into rr_gsb_mirror
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2022-09-06 17:00:42 -07:00 |
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tangxifan
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5489f19bce
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Merge pull request #767 from lnis-uofu/large_no_ts_test
Expand the no_time_stamp test case to bigger layout size
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2022-09-06 17:00:29 -07:00 |
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tangxifan
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477e2119d7
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[test] remove abs paths in golden outputs without time stamps
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2022-09-06 15:24:43 -07:00 |
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tangxifan
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93ab992187
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[test] update golden outputs without time stamps
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2022-09-06 14:59:00 -07:00 |
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tangxifan
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561d0a6545
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[test] add more test case to track golden outputs for representative fpga sizes
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2022-09-06 14:04:23 -07:00 |
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tangxifan
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e748c7697d
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[engine] update code comments
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2022-09-06 13:51:29 -07:00 |
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tangxifan
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eab3580f79
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[engine] now consider circuit model rather than switchId and SegmentId when identifying GSB structure similarity
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2022-09-06 13:40:29 -07:00 |
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tangxifan
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59440082ed
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[engine] fixed some syntax errors
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2022-09-06 11:55:40 -07:00 |
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tangxifan
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2f84ce5955
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[engine] now move rr_gsb mirror function outside the class, because of the circuit_lib should be used
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2022-09-06 11:48:21 -07:00 |
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tangxifan
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409753db81
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Merge branch 'master' into vtr_upgrade
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2022-09-02 17:43:19 -07:00 |
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tangxifan
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85532dd129
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Merge pull request #763 from lnis-uofu/patch_update
Pulling refs/heads/master into master
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2022-09-02 17:42:54 -07:00 |
|
github-actions[bot]
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462049eb0b
|
Updated Patch Count
|
2022-09-03 00:02:20 +00:00 |
|
tangxifan
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b26b2d0ed0
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Merge branch 'master' into vtr_upgrade
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2022-09-02 10:05:23 -07:00 |
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tangxifan
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b9c33bf9bc
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Merge pull request #762 from lnis-uofu/win32-build-02-sep-2022
add <array> declaration to fix gcc error
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2022-09-02 09:54:42 -07:00 |
coolbreeze413
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04abd1a36f
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add <array> declaration to fix gcc error
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2022-09-02 19:26:28 +05:30 |
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tangxifan
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9e1abf5898
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Merge branch 'master' into vtr_upgrade
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2022-09-01 21:39:14 -07:00 |
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tangxifan
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c81259e11c
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Merge pull request #760 from lnis-uofu/bitstream_encoding
Bitstream encoding - Resolve the limitation in support large FPGA devices using memory bank protocols
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2022-09-01 21:37:20 -07:00 |
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tangxifan
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98a59a01ba
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Merge branch 'master' into bitstream_encoding
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2022-09-01 20:34:51 -07:00 |
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tangxifan
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c48f750f86
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[test] now reduce the size for ql memory bank from 96x96 to 72x72; 96x96 requires >15G memory which exceeds github runner machine's RAM limit
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2022-09-01 20:10:29 -07:00 |
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tangxifan
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d3f08a893c
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[engine] now frame view will not build nets for configuration bus
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2022-09-01 20:02:00 -07:00 |