tangxifan
da95da933b
[Test] Add pin constraint file to map reset to correct FPGA pins
2021-04-17 15:04:26 -06:00
tangxifan
7172fc9ea1
[Test] Patch test for architecture using asynchronous DFFs
2021-04-16 20:48:37 -06:00
tangxifan
93be81abe1
[Test] Add test case for architecture using DFF with reset
2021-04-16 20:00:48 -06:00
tangxifan
d12a8a03fd
[Test] Update test case using yosys bram parameters
2021-03-16 19:52:17 -06:00
tangxifan
73b06256d0
[Test] Deploy the new yosys script supporting BRAM to regression tests
2021-03-16 16:52:59 -06:00
AurelienAlacchi
3f5cc59c0a
Microbenchmarks of Single-Port RAM and Associated Example Architecture Files as well as Test Cases ( #200 )
...
* Add required files for LUTRAM integration and testing
* Add task for lutram
* Repair format (tab and space mismatched)
* Add disclaimer in architecture file
Co-authored-by: Aur??Lien ALACCHI <u1235811@lnissrv4.eng.utah.edu>
2021-01-29 10:19:05 -07:00
tangxifan
655da9f3d0
[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention
2020-11-22 16:37:19 -07:00
tangxifan
3350695806
[Regression test] Add test case for pattern based local routing architecture
2020-09-23 16:06:47 -06:00
tangxifan
51c0319657
[Regression tests] Add test case for the k4n4 with fracturable 32-bit multiplier
2020-09-22 15:32:54 -06:00
tangxifan
3d1f49fb2f
[Regression Test] Add testcase for k4n4 with multiple segments
2020-09-22 12:47:41 -06:00
tangxifan
5741664580
[Regression Test] Add test case for k4n4 bram architecture
2020-09-22 12:23:56 -06:00
tangxifan
7ed9f76b06
[Regression test] Move k4n4 no local routing to basic test
2020-09-22 11:47:03 -06:00
tangxifan
2dea97afb6
[Regression test] reduce runtime for k4n4 test in basic testing
2020-09-22 11:45:29 -06:00
tangxifan
ea4dd410b7
[Regression Test] Add k4n4 fracturable lut test case to basic test
2020-09-22 11:41:36 -06:00
tangxifan
dad19cac9a
[Regression test] Add k4 series architecture: fracturable adder
2020-09-22 11:39:18 -06:00