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OpenFPGA
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6940 Commits

Author SHA1 Message Date
tangxifan 930d98f2af [test] deploy new tests 2023-07-08 21:52:16 -07:00
tangxifan 05a49278ed [doc] update file format 2023-07-08 21:37:00 -07:00
tangxifan 8850212465 [doc] document new command and update file format about fabric_key 2023-07-08 19:10:46 -07:00
tangxifan 124514c80e [test] update fabric key to new syntax 2023-07-08 18:26:05 -07:00
tangxifan 3de4d3fc09 [core] add a new command 'write_fabric_key' and now writer supports module-level keys 2023-07-08 18:12:51 -07:00
tangxifan 433391eec4 [core] move new functions to a separated source file 2023-07-07 15:03:03 -07:00
tangxifan d3aa4c53d0 [core] now support rebuild configuarable children for ccff submodules 2023-07-07 14:51:21 -07:00
tangxifan a1b13b8e12 [core] overload submodule configurable children from fabric key 2023-07-06 22:47:57 -07:00
tangxifan d3109ee88b [core] developing configurable children reloading from fabric key 2023-07-06 21:53:22 -07:00
tangxifan d0831507c0 [lib] format fabric key writer 2023-07-06 19:21:45 -07:00
tangxifan 85f9899588 [lib] fixed some bugs and now fabric key io is working 2023-07-06 16:30:36 -07:00
tangxifan 74e776f3b0 [lib] syntax errors and now fabric key is under the namespace of openfpga 2023-07-06 11:57:22 -07:00
tangxifan 6c623d60f9 [lib] code format 2023-07-06 11:16:36 -07:00
tangxifan 82a60d64e3 [lib] add api to fabric key 2023-07-05 23:53:16 -07:00
tangxifan ed25cf0dc4 [lib] developing sub key io and APIs 2023-07-05 21:18:33 -07:00
tangxifan 002bc23e2a
Merge pull request #1246 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-07-05 19:46:59 -07:00
github-actions[bot] fb5f59c179 Updated Patch Count 2023-07-06 00:02:44 +00:00
tangxifan 9ad8e4f9c8
Merge pull request #1243 from lnis-uofu/dependabot/submodules/yosys-14d50a1 
Bump yosys from `596da3f` to `14d50a1`
 2023-07-04 22:28:13 -07:00
tangxifan c2020d6cef [lib] now use constants in xml io for fabric key 2023-07-04 21:04:21 -07:00
dependabot[bot] 20acce924e
Bump yosys from `596da3f` to `14d50a1` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `596da3f` to `14d50a1`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](596da3f2a6...14d50a176d)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-07-04 07:00:23 +00:00
tangxifan 93158bdc62 [lib] adding subkey feature 2023-07-03 15:53:22 -07:00
tangxifan 1b9aeab2a7 [lib] reorganize the source files of libfabrickey 2023-07-03 15:02:23 -07:00
tangxifan dd3a0c799c
Merge pull request #1239 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-06-27 20:43:18 -07:00
github-actions[bot] 37329d90bc Updated Patch Count 2023-06-28 00:02:39 +00:00
tangxifan e103200fd8
Merge pull request #1237 from lnis-uofu/dependabot/submodules/yosys-596da3f 
Bump yosys from `f9257d3` to `596da3f`
 2023-06-27 11:01:29 -07:00
dependabot[bot] 9489951794
Bump yosys from `f9257d3` to `596da3f` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `f9257d3` to `596da3f`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](f9257d3192...596da3f2a6)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-06-27 06:59:32 +00:00
tangxifan a6e2366cc9
Merge pull request #1236 from lnis-uofu/xt_io_naming 
fpga_core wrapper now supports custom I/O names
 2023-06-26 20:15:44 -07:00
tangxifan 07c8714fe6
Merge branch 'master' into xt_io_naming 2023-06-26 16:44:44 -07:00
tangxifan 51e1547634 [test] hotfix 2023-06-26 15:32:16 -07:00
tangxifan 270d6f933b [test] add a new testcase to validate mock wrapper 2023-06-26 15:26:50 -07:00
tangxifan ddfb0c4afd [core] now mock fpga top supports fpga core wrapper 2023-06-26 15:06:11 -07:00
tangxifan 0112411101 [doc] hotfix 2023-06-26 12:26:41 -07:00
tangxifan 7974ea4426 [doc] update with example 2023-06-26 12:11:00 -07:00
tangxifan df17f43024 [doc] update figure 2023-06-26 12:10:37 -07:00
tangxifan 7958f4beca [doc] add figure 2023-06-26 11:54:28 -07:00
tangxifan 249964e98e [doc] add documentation about the io naming rules 2023-06-26 11:31:02 -07:00
tangxifan 83fa6a421e [core] code format 2023-06-26 10:06:17 -07:00
tangxifan 70f40cd21a [core] fixing bugs in the preconfig module when supporting dut module of fpga_core 2023-06-26 10:03:19 -07:00
tangxifan 919d6d8608 [test] added more testcases to validate the dut module option; fixing bugs on preconfigured testbenches 2023-06-25 22:49:51 -07:00
tangxifan 205881d0e7 [core] fixed the bug when using fpga_core instead of fpga_top 2023-06-25 18:03:15 -07:00
tangxifan 2af6d8480d
Merge pull request #1234 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-06-25 17:15:33 -07:00
github-actions[bot] ecf79fcb32 Updated Patch Count 2023-06-26 00:02:40 +00:00
tangxifan 150653287d [core] supporting io naming for verilog testbench generators 2023-06-25 15:29:27 -07:00
tangxifan b72917ecd3
Merge pull request #1232 from lnis-uofu/dependabot/submodules/yosys-f9257d3 
Bump yosys from `8f7a9a0` to `f9257d3`
 2023-06-25 14:39:15 -07:00
tangxifan 987a562e0f [core] fixed the bug when checking mapping status of fpga core ports 2023-06-23 17:21:52 -07:00
tangxifan 523e338d53 [test] debugging 2023-06-23 14:49:52 -07:00
tangxifan 962ba67e36 [test] adding new tests to validate fpga core wrapper naming rules 2023-06-23 14:47:21 -07:00
tangxifan 463332c77a [core] code complete for adding nets between top and core module 2023-06-23 13:21:25 -07:00
tangxifan b30148f8fb [core] apply more sanity checks on top module port 2023-06-23 12:37:46 -07:00
tangxifan 2484150ab6 [core] working on port addition to top module 2023-06-23 12:21:47 -07:00