5 Commits

Author	SHA1	Message	Date
tangxifan	542fadaaae	allow users to use VPR critical path delay in OpenFPGA simulation	2020-02-28 12:10:27 -07:00
tangxifan	1b66e837ba	bug fixing for lb router. Add physical mode to default node expanding settings	2020-02-21 11:29:00 -07:00
tangxifan	e842150cc5	add lut module builder	2020-02-12 19:52:41 -07:00
tangxifan	fddd3c9463	add mux module builder	2020-02-12 19:45:14 -07:00
tangxifan	02d6256e95	pass simple test on pb_type annotation for frac_lut5 architecture	2020-01-30 21:39:44 -07:00