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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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Ganesh Gore
5116aa2ae1
Added architecture and replaced variables
2019-08-19 19:02:50 -06:00
Ganesh Gore
7bfc48b8e4
Moved spice and verilog netlist folder location
2019-08-17 01:49:49 -06:00