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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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tangxifan
7ba3e27371
add duplicated_grid_pin test case to Travis CI
2020-04-12 20:10:51 -06:00
ganeshgore
f6b3c5854a
Bugfix :
...
+ OpenFPGA template variables update + Default path for the verilog netlist
2020-04-11 16:45:22 -06:00
ganeshgore
7f98ecc8a6
OpenFPGA shell run test script template
2020-04-06 00:32:43 -06:00