tangxifan
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323c4fdc9a
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clean up documentation build warnings and add guidelines for port naming
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2019-12-04 11:59:10 -07:00 |
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tangxifan
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42b528be57
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doc updates
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2019-08-21 15:11:25 -06:00 |
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tangxifan
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9c43b1b753
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complete refacotriing the inv and buf part in submodules
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2019-08-21 14:54:05 -06:00 |
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tangxifan
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b207050b03
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minor fix in documentation
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2019-08-06 14:17:57 -06:00 |
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tangxifan
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fc93a4941a
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update documentation
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2019-08-06 14:17:56 -06:00 |
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tangxifan
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7603850d72
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complete documentation for new features
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2019-08-06 14:17:56 -06:00 |
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Xifan Tang
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e7b40f06b0
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Add documentation for fracturable LUTs
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2019-07-17 15:21:07 -04:00 |
BaudouinChauviere
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a4d29aeb1b
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Update circuit_model_examples.rst
Typo correction
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2018-12-03 11:26:04 -07:00 |
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BaudouinChauviere
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99769c1510
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Create circuit_model_examples.rst
Better architecture of the doc
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2018-12-03 10:58:11 -07:00 |