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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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3 Commits
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tangxifan
5364b94cf8
[Tool] Update bitstream setting parser/writer to support interconnect-related syntax
2021-04-19 13:42:12 -06:00
tangxifan
85640a7403
[Tool] Extend bitstream setting to support mode bits overload from eblif file
2021-03-10 20:45:48 -07:00
tangxifan
f102e84497
[Tool] Add bitstream setting file to openfpga library
2021-02-01 17:43:46 -07:00