riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
2,655 Commits 71 Branches 8 Tags 105 MiB
Commit Graph

2 Commits

Author SHA1 Message Date
tangxifan b3796b0818 build io location map 2020-02-26 19:58:18 -07:00
tangxifan 25e0583636 add io location map data structure and start porting verilog testbench generator 2020-02-26 17:10:57 -07:00