3 Commits

Author	SHA1	Message	Date
tangxifan	17bc7fc296	update Verilog generator to use GSB data structure. SDC generator and TCL generator to go	2019-06-08 20:11:22 -06:00
tangxifan	924136e7a2	Clean warnings in SDC generator and use RRSwitchBlock to replace old data structure sb_info	2019-05-24 15:10:08 -06:00
tangxifan	46d44fa42a	Update VPR7 X2P with new engine	2019-04-26 12:23:47 -06:00