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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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53 Commits
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tangxifan
7e9e0ec9d4
[HDL] Bug fix in I/O HDL code
2020-11-02 15:15:45 -07:00
tangxifan
2f237a6240
[HDL] Add HDL codes for embedded I/Os
2020-11-02 14:01:27 -07:00
tangxifan
019208ec0f
[Architecture] Reorganize the cell netlists and update architecture files accordingly
2020-09-25 11:55:28 -06:00
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