4 Commits

Author	SHA1	Message	Date
tangxifan	8ab090651a	[FPGA-Verilog] Now port/wire names uses "__" to avoid collision with FPGA global ports	2022-03-16 20:51:37 +08:00
coolbreeze413	f60f5b4ae5	add wget to list of dependencies	2021-10-08 03:22:30 +05:30
Ashton Snelgrove	6f42d0c795	Add missing tcl dependencies	2020-12-22 18:14:09 -07:00
Ashton Snelgrove	e280b5b344	Add docker build workflow and fix submodule issues.	2020-12-22 17:37:14 -07:00