3 Commits

Author	SHA1	Message	Date
tangxifan	34fb003911	[core] replace width syntax with global port name	2024-06-29 10:46:00 -07:00
tangxifan	cab649893b	[core] update clock architecture	2024-06-26 18:06:39 -07:00
tangxifan	36ef555dda	[lib] add example arch for clock arch with internal drivers	2024-06-24 18:33:47 -07:00