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OpenFPGA
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3 Commits

Author SHA1 Message Date
tangxifan 075264e3e3 debugging LUT bitstream generation 2020-02-25 23:29:16 -07:00
tangxifan 2c44c70557 bring pb interconnection bitstream generation online 2020-02-25 00:28:06 -07:00
tangxifan 04c69d30c2 start adding grid bitstream builder. TODO: lut and interconnect bitstream decoding 2020-02-24 19:38:02 -07:00