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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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3 Commits
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tangxifan
b5e5182f52
frame-based configuration protocol is working on k4n4 arch now. Spot bugs in iVerilog about negedge flip-flops
2020-06-11 19:31:11 -06:00
tangxifan
583c15131b
change configuration latch to be triggered at negative edge; Frame-based fabric passed Modelsim verification but failed in iVerilog
2020-06-11 19:31:11 -06:00
tangxifan
f5968fda52
add configurable latch Verilog codes
2020-06-11 19:31:10 -06:00