tangxifan
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965ee2190e
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[core] support intermediate driver in clock arch
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2024-09-20 17:42:26 -07:00 |
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tangxifan
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b2fc47a12a
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[core] reworked i/o for clock network files
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2024-07-10 14:34:54 -07:00 |
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tangxifan
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34fb003911
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[core] replace width syntax with global port name
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2024-06-29 10:46:00 -07:00 |
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tangxifan
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cab649893b
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[core] update clock architecture
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2024-06-26 18:06:39 -07:00 |
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tangxifan
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36ef555dda
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[lib] add example arch for clock arch with internal drivers
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2024-06-24 18:33:47 -07:00 |
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tangxifan
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9ccd14bf4d
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[lib] now default switch of clk ntwk is split to default_tap_switch and default_driver_switch
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2024-06-21 16:45:05 -07:00 |
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tangxifan
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2735b708d3
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[core] reworked the tapping XML syntax
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2023-02-27 22:59:44 -08:00 |
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tangxifan
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3a40c5e15f
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[lib] update example of clock arch definition
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2023-02-27 21:49:14 -08:00 |
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tangxifan
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7f07a9d031
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[lib] add default seg/switch to clock arch. Fixed syntax
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2023-02-24 19:15:39 -08:00 |
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tangxifan
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65b27a3377
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[lib] fixed a few bugs
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2023-02-22 21:29:18 -08:00 |
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tangxifan
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40f6b5a3fe
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[lib] fixed a few bugs
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2023-02-22 21:23:08 -08:00 |
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tangxifan
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a9d5e4dfbd
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[lib] update example clock arch xml
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2023-02-22 21:18:00 -08:00 |
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tangxifan
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e7fc065032
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[lib] start developing clock arch data structure and I/O
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2023-02-21 15:06:35 -08:00 |