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Path correction 2

This commit is contained in:
AurelienUoU 2019-05-28 11:59:09 -06:00
parent 20f80a73e7
commit ffdcd4bb9c
1 changed files with 1 additions and 1 deletions
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vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml
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@ -180,7 +180,7 @@
</input> </input>
</stimulate> </stimulate>
</parameters> </parameters>
<tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/research/ece/lnis/USERS/alacchi/Current_release/branch_multimode/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/> <tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/home/travis/build/LNIS-Projects/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/>
<transistors pn_ratio="2" model_ref="M"> <transistors pn_ratio="2" model_ref="M">
<nmos model_name="nch" chan_length="40e-9" min_width="140e-9"/> <nmos model_name="nch" chan_length="40e-9" min_width="140e-9"/>
<pmos model_name="pch" chan_length="40e-9" min_width="140e-9"/> <pmos model_name="pch" chan_length="40e-9" min_width="140e-9"/>