From fdbc427f70aea0cd1bfe98e4be8e70edc2b931ea Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Fri, 5 Jul 2024 11:17:05 -0700
Subject: [PATCH] [core] debug

---
 openfpga/src/annotation/annotate_rr_graph.cpp | 8 ++++----
 vtr-verilog-to-routing                        | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/openfpga/src/annotation/annotate_rr_graph.cpp b/openfpga/src/annotation/annotate_rr_graph.cpp
index d0833ae19..78ff7c356 100644
--- a/openfpga/src/annotation/annotate_rr_graph.cpp
+++ b/openfpga/src/annotation/annotate_rr_graph.cpp
@@ -115,13 +115,13 @@ static RRGSB build_rr_gsb(const DeviceContext& vpr_device_ctx,
     std::map<e_side, vtr::Point<size_t>> track_range;
     track_range[TOP] = vtr::Point<size_t>(0, gsb_range.y());
     track_range[RIGHT] = vtr::Point<size_t>(0, gsb_range.x());
-    track_range[BOTTOM] = vtr::Point<size_t>(1, gsb_range.y());
-    track_range[LEFT] = vtr::Point<size_t>(1, gsb_range.x());
+    track_range[BOTTOM] = vtr::Point<size_t>(0, gsb_range.y());
+    track_range[LEFT] = vtr::Point<size_t>(0, gsb_range.x());
     if (perimeter_cb) {
         track_range[TOP] = vtr::Point<size_t>(0, gsb_range.y() + 1);
         track_range[RIGHT] = vtr::Point<size_t>(0, gsb_range.x() + 1);
-        track_range[BOTTOM] = vtr::Point<size_t>(0, gsb_range.y() + 2);
-        track_range[LEFT] = vtr::Point<size_t>(0, gsb_range.x() + 2);
+        track_range[BOTTOM] = vtr::Point<size_t>(0, gsb_range.y() + 1);
+        track_range[LEFT] = vtr::Point<size_t>(0, gsb_range.x() + 1);
     }
 
   /* Create an object to return */
diff --git a/vtr-verilog-to-routing b/vtr-verilog-to-routing
index b06f2ee34..de0d0bc21 160000
--- a/vtr-verilog-to-routing
+++ b/vtr-verilog-to-routing
@@ -1 +1 @@
-Subproject commit b06f2ee34036a8c981a2c202ec06251c1bb2b81a
+Subproject commit de0d0bc214419cae53c10e6a1349d4ae251625f8