From fcc3bf096790f475b2d2922e3ce77751d623c6fb Mon Sep 17 00:00:00 2001
From: BaudouinChauviere <43420516+BaudouinChauviere@users.noreply.github.com>
Date: Mon, 1 Apr 2019 16:23:24 -0600
Subject: [PATCH] Update command_line_usage.rst

---
 docs/source/fpga_spice/command_line_usage.rst | 40 +++++++++----------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/docs/source/fpga_spice/command_line_usage.rst b/docs/source/fpga_spice/command_line_usage.rst
index 73f979e17..129c05e05 100644
--- a/docs/source/fpga_spice/command_line_usage.rst
+++ b/docs/source/fpga_spice/command_line_usage.rst
@@ -4,24 +4,24 @@ All the command line options of FPGA-SPICE can be shown by calling the help menu
 
 FPGA-SPICE Supported Options::
 
-	--fpga_spice
-	--fpga_spice_dir <directory_path_output_spice_netlists>
-	--fpga_spice_print_top_testbench
-	--fpga_spice_print_lut_testbench
-	--fpga_spice_print_hardlogic_testbench
-	--fpga_spice_print_pb_mux_testbench
-	--fpga_spice_print_cb_mux_testbench
-	--fpga_spice_print_sb_mux_testbench
-	--fpga_spice_print_cb_testbench
-	--fpga_spice_print_sb_testbench
-	--fpga_spice_print_grid_testbench
-	--fpga_spice_rename_illegal_port
-	--fpga_spice_signal_density_weight <float>
-	--fpga_spice_sim_window_size <float>
-	--fpga_spice_leakage_only
-	--fpga_spice_parasitic_net_estimation_off
-	--fpga_spice_testbench_load_extraction_off
-	--fpga_spice_sim_mt_num <int>
+    --fpga_spice
+    --fpga_spice_dir <directory_path_output_spice_netlists>
+    --fpga_spice_print_top_testbench
+    --fpga_spice_print_lut_testbench
+    --fpga_spice_print_hardlogic_testbench
+    --fpga_spice_print_pb_mux_testbench
+    --fpga_spice_print_cb_mux_testbench
+    --fpga_spice_print_sb_mux_testbench
+    --fpga_spice_print_cb_testbench
+    --fpga_spice_print_sb_testbench
+    --fpga_spice_print_grid_testbench
+    --fpga_spice_rename_illegal_port
+    --fpga_spice_signal_density_weight <float>
+    --fpga_spice_sim_window_size <float>
+    --fpga_spice_leakage_only
+    --fpga_spice_parasitic_net_estimation_off
+    --fpga_spice_testbench_load_extraction_off
+    --fpga_spice_sim_mt_num <int>
 
 .. note:: FPGA-SPICE requires the input of activity estimation results (\*.act file) from ACE2. 
    Remember to use the option --activity_file <act_file> to read the activity file. 
@@ -40,7 +40,7 @@ FPGA-SPICE Supported Options::
    "--fpga_spice_dir <dir_path>", "Specify the directory that all the SPICE netlists will be outputted to. <dir_path> is the destination directory."
    "--fpga_spice_print_top_testbench", "Print the full-chip-level testbench for the FPGA."
    "--fpga_spice_print_lut_testbench", "Print the testbenches for all the LUTs."
-   "--fpga_spice_print_hardlogic_testbench", "Print the test benches for all the hardlogics."
+   "--fpga_spice_print_hardlogic_testbench", "Print the test benches for all the hard logic."
    "--fpga_spice_print_pb_mux_testbench", "Print the testbenches for all the multiplexers in the logic blocks."
    "--fpga_spice_print_cb_mux_testbench", "Print the testbenches for all the multiplexers in Connection Boxes."
    "-- fpga_spice_print_sb_mux_testbench", "Print the testbenches for all the multiplexers in Switch Blocks."
@@ -55,4 +55,4 @@ FPGA-SPICE Supported Options::
    "--fpga_spice_testbench_load_extraction_off", "Turn off the load effect on net estimation technique."
    "--fpga_spice_sim_mt_num <int>", "Set the number of multi-thread used in simulation"
 
-.. note:: The parasitic net estimation technique is used to analyze the parasitic net activities which improves the accuracy of power analysis. When turned off, the errors between the full-chip-level and grid/component-level testbenches will increase."
+.. note:: The parasitic net estimation technique is used to analyze the parasitic net activities which improve the accuracy of power analysis. When turned off, the errors between the full-chip-level and grid/component-level testbenches will increase."