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OpenFPGA
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Yosys only support added in OpenFPGA

This commit is contained in:
Awais Abbas 2022-01-06 14:44:11 +05:00
parent 1d4fa96d54
commit fc52a4696c
2 changed files with 26 additions and 16 deletions
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35
openfpga_flow/scripts/run_fpga_flow.py
View File

@ -273,23 +273,32 @@ def main():
if (args.fpga_flow == "vpr_blif"):
collect_files_for_vpr()
logger.info("Running OpenFPGA Shell Engine ")
run_openfpga_shell()
if args.end_flow_with_test:
run_netlists_verification()
if (args.fpga_flow == "yosys"):
run_yosys_with_abc()
if not (args.fpga_flow == "yosys"):
logger.info("Running OpenFPGA Shell Engine ")
run_openfpga_shell()
if args.end_flow_with_test:
run_netlists_verification()
ExecTime["End"] = time.time()
def timestr(x): return humanize.naturaldelta(timedelta(seconds=x)) \
if "humanize" in sys.modules else str(int(x)) + " Sec "
TimeInfo = ("Openfpga_flow completed, " +
"Total Time Taken %s " %
timestr(ExecTime["End"]-ExecTime["Start"]) +
"VPR Time %s " %
timestr(ExecTime["VPREnd"]-ExecTime["VPRStart"]))
TimeInfo += ("Verification Time %s " %
timestr(ExecTime["VerificationEnd"] -
ExecTime["VerificationStart"])
if args.end_flow_with_test else "")
if (args.fpga_flow == "yosys"):
TimeInfo = ("Openfpga_flow completed, " +
"Total Time Taken %s " %
timestr(ExecTime["End"]-ExecTime["Start"]))
else:
TimeInfo = ("Openfpga_flow completed, " +
"Total Time Taken %s " %
timestr(ExecTime["End"]-ExecTime["Start"]) +
"VPR Time %s " %
timestr(ExecTime["VPREnd"]-ExecTime["VPRStart"]))
TimeInfo += ("Verification Time %s " %
timestr(ExecTime["VerificationEnd"] -
ExecTime["VerificationStart"])
if args.end_flow_with_test else "")
logger.info(TimeInfo)
exit()

7
openfpga_flow/scripts/run_fpga_task.py
View File

@ -96,13 +96,14 @@ def main():
for eachtask in args.tasks:
logger.info("Currently running task %s" % eachtask)
eachtask = eachtask.replace("\\", "/").split("/")
job_run_list = generate_each_task_actions(eachtask)
job_run_list, GeneralSection = generate_each_task_actions(eachtask)
if args.remove_run_dir:
continue
eachtask = "_".join(eachtask)
if not args.test_run:
run_actions(job_run_list)
collect_results(job_run_list)
if not (GeneralSection.get("fpga_flow") == "yosys"):
collect_results(job_run_list)
else:
pprint.pprint(job_run_list)
logger.info("Task execution completed")
@ -350,7 +351,7 @@ def generate_each_task_actions(taskname):
logger.info('Found %d Architectures %d Benchmarks & %d Script Parameters' %
(len(archfile_list), len(benchmark_list), len(ScriptSections)))
logger.info('Created total %d jobs' % len(flow_run_cmd_list))
return flow_run_cmd_list
return flow_run_cmd_list,GeneralSection
# Make the directory name unique by including the benchmark index in the list.
# This is because benchmarks may share the same top module names