remove unused variable in sim info writer

This commit is contained in:
tangxifan 2019-11-02 16:35:32 -06:00
parent 0852ef33c3
commit fc164abd49
3 changed files with 0 additions and 3 deletions

View File

@ -24,7 +24,6 @@
********************************************************************/
void print_verilog_simulation_info(const std::string& simulation_ini_filename,
const std::string& parent_dir,
const std::string& verilog_dir,
const std::string& circuit_name,
const std::string& src_dir,
const size_t& num_program_clock_cycles,

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@ -5,7 +5,6 @@
void print_verilog_simulation_info(const std::string& simulation_ini_filename,
const std::string& parent_dir,
const std::string& verilog_dir,
const std::string& circuit_name,
const std::string& src_dir,
const size_t& num_program_clock_cycles,

View File

@ -437,7 +437,6 @@ void vpr_fpga_verilog(ModuleManager& module_manager,
/* Print exchangeable files which contains simulation settings */
print_verilog_simulation_info(std::string(vpr_setup.FPGA_SPICE_Opts.SynVerilogOpts.simulation_ini_path),
std::string(format_dir_path(chomped_parent_dir)),
std::string(msim_dir_path),
std::string(chomped_circuit_name),
std::string(src_dir_path),
bitstream_manager.bits().size(),