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OpenFPGA
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added git cloning and tool building

This commit is contained in:
stevecorey 2018-06-29 11:16:13 -06:00
parent 6f4b7f5cb9
commit f8e1e06a6c
1 changed files with 109 additions and 33 deletions
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142
jupyter_example.ipynb
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@ -16,17 +16,115 @@
"cell_type": "markdown",
"metadata": {},
"source": [
"To run FPGA-SPICE, define its location:"
"Clone the [FPGA-SPICE git repository:](https://github.com/LNIS-Projects/OpenFPGA)\n",
"\n"
]
},
{
"cell_type": "code",
"execution_count": 1,
"metadata": {},
"outputs": [
{
"name": "stdout",
"output_type": "stream",
"text": [
"Wait for the clone to finish with a return code of 0.\n"
]
},
{
"data": {
"text/plain": [
"0"
]
},
"execution_count": 1,
"metadata": {},
"output_type": "execute_result"
}
],
"source": [
"import os\n",
"# change to the user's HOME directory\n",
"os.chdir(os.environ['HOME']) \n",
"print (\"Wait for the clone to finish with a return code of 0.\")\n",
"os.system(\"git clone https://github.com/LNIS-Projects/OpenFPGA.git\")"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"The repository contains a submodule, so you need to get it as well:"
]
},
{
"cell_type": "code",
"execution_count": 2,
"metadata": {},
"outputs": [
{
"name": "stdout",
"output_type": "stream",
"text": [
"Wait for the submodule update to finish with a return code of 0.\n"
]
},
{
"data": {
"text/plain": [
"0"
]
},
"execution_count": 2,
"metadata": {},
"output_type": "execute_result"
}
],
"source": [
"# move into the master repository \n",
"os.chdir(\"./OpenFPGA\")\n",
"# get the submodule\n",
"os.system(\"git submodule init\")\n",
"print (\"Wait for the submodule update to finish with a return code of 0.\")\n",
"os.system(\"git submodule update\")"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"Build the VPR tool with the FPGA-SPICE functionality:"
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {},
"outputs": [],
"source": [
"# move to the directory with the Makefile\n",
"os.chdir(\"./tangxifan-eda-tools/branches/vpr7_rram/vpr/\")\n",
"# run make\n",
"print (\"Wait for make to finish with a return code of 0.\")\n",
"os.system(\"make\")"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"To run FPGA-SPICE, define its location:"
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {},
"outputs": [],
"source": [
"# set this to the location of the vpr executable file\n",
"fpga_spice = \"~/tangxifan-eda-tools/branches/vpr7_rram/vpr/vpr\""
"fpga_spice = \"~/OpenFPGA/tangxifan-eda-tools/branches/vpr7_rram/vpr/vpr\""
]
},
{
@ -38,12 +136,12 @@
},
{
"cell_type": "code",
"execution_count": 2,
"execution_count": null,
"metadata": {},
"outputs": [],
"source": [
"arch = \"~/tangxifan-eda-tools/branches/vpr7_rram/libarchfpga/arch/sample_arch.xml\"\n",
"circuit = \"~/tangxifan-eda-tools/branches/vpr7_rram/vpr/Circuits/s298_K6_N10_ace.blif\""
"arch = \"~/OpenFPGA/tangxifan-eda-tools/branches/vpr7_rram/libarchfpga/arch/sample_arch.xml\"\n",
"circuit = \"~/OpenFPGA/tangxifan-eda-tools/branches/vpr7_rram/vpr/Circuits/s298_K6_N10_ace.blif\""
]
},
{
@ -55,22 +153,11 @@
},
{
"cell_type": "code",
"execution_count": 3,
"execution_count": null,
"metadata": {},
"outputs": [
{
"data": {
"text/plain": [
"0"
]
},
"execution_count": 3,
"metadata": {},
"output_type": "execute_result"
}
],
"outputs": [],
"source": [
"import os\n",
"\n",
"command_line = fpga_spice + \" \" + arch + \" \" + circuit\n",
"os.system(command_line)"
]
@ -86,7 +173,7 @@
},
{
"cell_type": "code",
"execution_count": 4,
"execution_count": null,
"metadata": {},
"outputs": [],
"source": [
@ -95,20 +182,9 @@
},
{
"cell_type": "code",
"execution_count": 5,
"execution_count": null,
"metadata": {},
"outputs": [
{
"data": {
"text/plain": [
"0"
]
},
"execution_count": 5,
"metadata": {},
"output_type": "execute_result"
}
],
"outputs": [],
"source": [
"os.system(command_line_nodisp)"
]