From f70f387f9f7c6448bcb9285985ab04760a3e1d19 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 1 Nov 2019 20:51:49 -0600 Subject: [PATCH] minor tuning on ini compilation --- libs/external/libini/CMakeLists.txt | 5 +++-- .../fpga_x2p/verilog/simulation_info_writer.cpp | 14 +++++++------- .../SRC/fpga_x2p/verilog/simulation_info_writer.h | 14 +++++++------- 3 files changed, 17 insertions(+), 16 deletions(-) diff --git a/libs/external/libini/CMakeLists.txt b/libs/external/libini/CMakeLists.txt index 2730c6325..c09ff863b 100644 --- a/libs/external/libini/CMakeLists.txt +++ b/libs/external/libini/CMakeLists.txt @@ -7,6 +7,7 @@ files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS) #Create the library add_library(libini STATIC - ${LIB_HEADERS}) + ${LIB_HEADERS}) + target_include_directories(libini PUBLIC ${LIB_INCLUDE_DIRS}) -set_target_properties(libini PROPERTIES PREFIX "" LINKER_LANGUAGE CXX) \ No newline at end of file +set_target_properties(libini PROPERTIES PREFIX "" LINKER_LANGUAGE CXX) diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.cpp b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.cpp index 67850403d..21b11c08e 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.cpp +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.cpp @@ -22,13 +22,13 @@ * Top-level function to write an ini file which contains exchangeable * information, in order to interface different Verilog simulators ********************************************************************/ -void print_verilog_simulation_info(const int &num_operating_clock_cycles, - const std::string &verilog_dir_formatted, - const std::string &chomped_circuit_name, - const std::string &src_dir_path, - const size_t &num_program_clock_cycles, - const float &prog_clock_freq, - const float &op_clock_freq) { +void print_verilog_simulation_info(const int& num_operating_clock_cycles, + const std::string& verilog_dir_formatted, + const std::string& chomped_circuit_name, + const std::string& src_dir_path, + const size_t& num_program_clock_cycles, + const float& prog_clock_freq, + const float& op_clock_freq) { mINI::INIStructure ini; // std::map units_map; // units_map['s']=1; // units_map['ms']=1E-3; // units_map['us']=1E-6; diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.h b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.h index feedb8e94..ce0798fdf 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.h +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/simulation_info_writer.h @@ -3,11 +3,11 @@ #include -void print_verilog_simulation_info(const int &num_operating_clock_cycles, - const std::string &verilog_dir_formatted, - const std::string &chomped_circuit_name, - const std::string &src_dir_path, - const size_t &num_program_clock_cycles, - const float &prog_clock_freq, - const float &op_clock_freq); +void print_verilog_simulation_info(const int& num_operating_clock_cycles, + const std::string& verilog_dir_formatted, + const std::string& chomped_circuit_name, + const std::string& src_dir_path, + const size_t& num_program_clock_cycles, + const float& prog_clock_freq, + const float& op_clock_freq); #endif