From f70cc3282488ae25ccecab699893e9a6188d1540 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Sat, 22 Apr 2023 08:46:36 +0800
Subject: [PATCH] [core] developing checkers for configuration protocol w.r.t.
 the programming clocks

---
 .../src/base/openfpga_read_arch_template.h    |  2 +-
 openfpga/src/utils/check_config_protocol.cpp  | 83 +++++++++++++++++++
 openfpga/src/utils/check_config_protocol.h    | 22 +++++
 3 files changed, 106 insertions(+), 1 deletion(-)
 create mode 100644 openfpga/src/utils/check_config_protocol.cpp
 create mode 100644 openfpga/src/utils/check_config_protocol.h

diff --git a/openfpga/src/base/openfpga_read_arch_template.h b/openfpga/src/base/openfpga_read_arch_template.h
index 9d7f32b0a..b7c626755 100644
--- a/openfpga/src/base/openfpga_read_arch_template.h
+++ b/openfpga/src/base/openfpga_read_arch_template.h
@@ -55,7 +55,7 @@ int read_openfpga_arch_template(T& openfpga_context, const Command& cmd,
     return CMD_EXEC_FATAL_ERROR;
   }
 
-  if (false == check_configurable_memory_circuit_model(
+  if (false == check_config_protocol(
                  openfpga_context.arch().config_protocol,
                  openfpga_context.arch().circuit_lib)) {
     return CMD_EXEC_FATAL_ERROR;
diff --git a/openfpga/src/utils/check_config_protocol.cpp b/openfpga/src/utils/check_config_protocol.cpp
new file mode 100644
index 000000000..194f73436
--- /dev/null
+++ b/openfpga/src/utils/check_config_protocol.cpp
@@ -0,0 +1,83 @@
+/************************************************************************
+ * Check functions for the content of config protocol to avoid conflicts with
+ * other data structures
+ * These functions are not universal methods for the ConfigProtocol class
+ * They are made to ease the development in some specific purposes
+ * Please classify such functions in this file
+ ***********************************************************************/
+#include "circuit_library_utils.h"
+#include "check_config_protocol.h"
+#include "vtr_assert.h"
+#include "vtr_log.h"
+
+/* begin namespace openfpga */
+namespace openfpga {
+
+/********************************************************************
+ * Check if the programming clock port defined in configuration protocol is a valid global programming clock of a ccff model
+ *******************************************************************/
+int check_config_protocol_programming_clock(
+  const ConfigProtocol& config_protocol, const CircuitLibrary& circuit_lib) {
+  int num_err = 0;
+  /* Programming clock is only available for CCFF */
+  if (config_protocol.type() == CONFIG_MEM_SCAN_CHAIN) {
+    return num_err;
+  }
+  /* Must find a CCFF model */
+  std::vector<CircuitModelId> ccff_models = circuit_lib.models_by_type(CIRCUIT_MODEL_CCFF);
+  if (ccff_models.empty()) {
+    VTR_LOG_ERROR("Expect at least one CCFF model to be defined in circuit library!\n");
+    num_err++;
+  }
+  /* Try to match the programming clock port name with the CCFF port name */
+  for (BasicPort prog_clk_port : config_protocol.prog_clock_ports()) {
+    bool port_match = false;
+    for (CircuitModelId ccff_model : ccff_models) { 
+      CircuitPortId circuit_port = circuit_lib.model_port(ccff_model, prog_clk_port.get_name()); 
+      if (circuit_port) {
+        port_match = true;
+        /* Ensure this is a programming clock and a global port */
+        if (!circuit_lib.port_is_global(circuit_port)) {
+          VTR_LOG_ERROR("Expect the programming clock '%s' to be a global port but not!\n", prog_clk_port.get_name().c_str());
+          num_err++;
+        }
+        if (circuit_lib.port_type(circuit_port) != CIRCUIT_MODEL_PORT_CLOCK) {
+          VTR_LOG_ERROR("Expect the programming clock '%s' to be a clock port but not!\n", prog_clk_port.get_name().c_str());
+          num_err++;
+        }
+        if (!circuit_lib.port_is_prog(circuit_port)) {
+          VTR_LOG_ERROR("Expect the programming clock '%s' to be a programming port but not!\n", prog_clk_port.get_name().c_str());
+          num_err++;
+        }
+      }
+    }
+    if (!port_match) {
+      VTR_LOG_ERROR("Fail to find a port of any CCFF model that matches the programming clock definition (Expect port name: '%s')!\n", prog_clk_port.get_name().c_str());
+      num_err++;
+    }
+  }
+
+  return num_err;
+}
+
+/********************************************************************
+ * Check if the configuration protocol is valid without any conflict with
+ * circuit library content.
+ *******************************************************************/
+bool check_config_protocol(
+  const ConfigProtocol& config_protocol, const CircuitLibrary& circuit_lib) {
+  int num_err = 0;
+  if (false == check_configurable_memory_circuit_model(
+                 config_protocol,
+                 circuit_lib)) {
+    num_err++;
+  }
+
+  num_err += check_config_protocol_programming_clock(
+    config_protocol, circuit_lib);
+
+  VTR_LOG("Found %ld errors when checking configuration protocol!\n", num_err);
+  return (0 == num_err);
+}
+
+} /* end namespace openfpga */
diff --git a/openfpga/src/utils/check_config_protocol.h b/openfpga/src/utils/check_config_protocol.h
new file mode 100644
index 000000000..8b4b47ba1
--- /dev/null
+++ b/openfpga/src/utils/check_config_protocol.h
@@ -0,0 +1,22 @@
+#ifndef CHECK_CONFIG_PROTOCOL_H
+#define CHECK_CONFIG_PROTOCOL_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include "config_protocol.h"
+#include "circuit_library.h"
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+
+/* begin namespace openfpga */
+namespace openfpga {
+
+bool check_config_protocol(
+  const ConfigProtocol& config_protocol, const CircuitLibrary& circuit_lib);
+
+} /* end namespace openfpga */
+
+#endif