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[core] update API call due to vtr upgrade

This commit is contained in:
tangxifan 2024-07-03 17:04:06 -07:00
parent 60f0c087d8
commit f681c6a903
1 changed files with 16 additions and 9 deletions
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25
openfpga/src/annotation/append_clock_rr_graph.cpp
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@ -45,6 +45,7 @@ static size_t estimate_clock_rr_graph_num_chan_nodes(
*******************************************************************/
static size_t estimate_clock_rr_graph_num_nodes(const DeviceGrid& grids,
const size_t& layer,
const bool& perimeter_cb,
const bool& through_channel,
const ClockNetwork& clk_ntwk) {
size_t num_nodes = 0;
@ -55,7 +56,7 @@ static size_t estimate_clock_rr_graph_num_nodes(const DeviceGrid& grids,
/* Bypass if the routing channel does not exist when through channels are
* not allowed */
if ((false == through_channel) &&
(false == is_chanx_exist(grids, layer, chanx_coord))) {
(false == is_chanx_exist(grids, layer, chanx_coord, perimeter_cb))) {
continue;
}
/* Estimate the routing tracks required by clock routing only */
@ -69,7 +70,7 @@ static size_t estimate_clock_rr_graph_num_nodes(const DeviceGrid& grids,
/* Bypass if the routing channel does not exist when through channel are
* not allowed */
if ((false == through_channel) &&
(false == is_chany_exist(grids, layer, chany_coord))) {
(false == is_chany_exist(grids, layer, chany_coord, perimeter_cb))) {
continue;
}
/* Estimate the routing tracks required by clock routing only */
@ -151,7 +152,9 @@ static void add_rr_graph_block_clock_nodes(
static void add_rr_graph_clock_nodes(
RRGraphBuilder& rr_graph_builder, RRClockSpatialLookup& clk_rr_lookup,
const RRGraphView& rr_graph_view, const DeviceGrid& grids,
const size_t& layer, const bool& through_channel,
const size_t& layer,
const bool& perimeter_cb,
const bool& through_channel,
const ClockNetwork& clk_ntwk, const bool& verbose) {
/* Pre-allocate memory: Must do otherwise data will be messed up! */
clk_rr_lookup.reserve_nodes(grids.width(), grids.height(),
@ -165,7 +168,7 @@ static void add_rr_graph_clock_nodes(
/* Bypass if the routing channel does not exist when through channels are
* not allowed */
if ((false == through_channel) &&
(false == is_chanx_exist(grids, layer, chanx_coord))) {
(false == is_chanx_exist(grids, layer, chanx_coord, perimeter_cb))) {
continue;
}
add_rr_graph_block_clock_nodes(
@ -187,7 +190,7 @@ static void add_rr_graph_clock_nodes(
/* Bypass if the routing channel does not exist when through channel are
* not allowed */
if ((false == through_channel) &&
(false == is_chany_exist(grids, layer, chany_coord))) {
(false == is_chany_exist(grids, layer, chany_coord, perimeter_cb))) {
continue;
}
add_rr_graph_block_clock_nodes(
@ -729,7 +732,9 @@ static int add_rr_graph_opin2clk_edges(
static void add_rr_graph_clock_edges(
RRGraphBuilder& rr_graph_builder, size_t& num_edges_to_create,
const RRClockSpatialLookup& clk_rr_lookup, const RRGraphView& rr_graph_view,
const DeviceGrid& grids, const size_t& layer, const bool& through_channel,
const DeviceGrid& grids, const size_t& layer,
const bool& perimeter_cb,
const bool& through_channel,
const ClockNetwork& clk_ntwk, const bool& verbose) {
/* Add edges which is driven by X-direction clock routing tracks */
for (size_t iy = 0; iy < grids.height() - 1; ++iy) {
@ -738,7 +743,7 @@ static void add_rr_graph_clock_edges(
/* Bypass if the routing channel does not exist when through channels are
* not allowed */
if ((false == through_channel) &&
(false == is_chanx_exist(grids, layer, chanx_coord))) {
(false == is_chanx_exist(grids, layer, chanx_coord, perimeter_cb))) {
continue;
}
add_rr_graph_block_clock_edges(rr_graph_builder, num_edges_to_create,
@ -754,7 +759,7 @@ static void add_rr_graph_clock_edges(
/* Bypass if the routing channel does not exist when through channel are
* not allowed */
if ((false == through_channel) &&
(false == is_chany_exist(grids, layer, chany_coord))) {
(false == is_chany_exist(grids, layer, chany_coord, perimeter_cb))) {
continue;
}
add_rr_graph_block_clock_edges(rr_graph_builder, num_edges_to_create,
@ -793,7 +798,7 @@ int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
/* Estimate the number of nodes and pre-allocate */
size_t orig_num_nodes = vpr_device_ctx.rr_graph.num_nodes();
size_t num_clock_nodes = estimate_clock_rr_graph_num_nodes(
vpr_device_ctx.grid, 0, vpr_device_ctx.arch->through_channel, clk_ntwk);
vpr_device_ctx.grid, 0, vpr_device_ctx.arch->perimeter_cb, vpr_device_ctx.arch->through_channel, clk_ntwk);
vpr_device_ctx.rr_graph_builder.unlock_storage();
vpr_device_ctx.rr_graph_builder.reserve_nodes(num_clock_nodes +
orig_num_nodes);
@ -805,6 +810,7 @@ int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
/* Add clock nodes */
add_rr_graph_clock_nodes(vpr_device_ctx.rr_graph_builder, clk_rr_lookup,
vpr_device_ctx.rr_graph, vpr_device_ctx.grid, 0,
vpr_device_ctx.arch->perimeter_cb,
vpr_device_ctx.arch->through_channel, clk_ntwk,
verbose);
VTR_LOGV(verbose,
@ -820,6 +826,7 @@ int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
vpr_device_ctx.rr_graph_builder, num_clock_edges,
static_cast<const RRClockSpatialLookup&>(clk_rr_lookup),
vpr_device_ctx.rr_graph, vpr_device_ctx.grid, 0,
vpr_device_ctx.arch->perimeter_cb,
vpr_device_ctx.arch->through_channel, clk_ntwk, verbose);
VTR_LOGV(verbose,
"Added %lu clock edges to routing "