Update user_defined_temp_tutorial
Change "example" in the beginning of the page to "tutorial" for clarity
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@ -5,9 +5,9 @@ Introduction and Setup
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**In this tutorial, we will**
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- Provide the motivation for generating the user_defined_template.v verilog file
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- Go through a generated user_defined_template.v file to demonstrate how to use it
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Through this example, we will show how and when to use the ``user_defined_template.v`` file.
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Through this tutorial, we will show how and when to use the ``user_defined_template.v`` file.
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For this example, we are using a modified version of the hard adder task that comes with OpenFPGA.
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To begin the tutorial, we start with a modified version of the hard adder task that comes with OpenFPGA.
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To follow along, go to the root directory of OpenFPGA and enter:
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.. code-block:: bash
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