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[FPGA-Verilog] Fixed bugs in preconfigured wrapper generator when bus group is used

This commit is contained in:
tangxifan 2022-02-18 14:08:03 -08:00
parent 8ba3d06392
commit f5dd89bbd9
1 changed files with 19 additions and 20 deletions
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39
openfpga/src/fpga_verilog/verilog_preconfig_top_module.cpp
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@ -65,6 +65,25 @@ void print_verilog_preconfig_top_module_ports(std::fstream &fp,
}
std::string block_name = atom_ctx.nlist.block_name(atom_blk);
/* The block may be renamed as it contains special characters which violate Verilog syntax */
if (true == netlist_annotation.is_block_renamed(atom_blk)) {
block_name = netlist_annotation.block_name(atom_blk);
}
/* For output block, remove the prefix which is added by VPR */
std::vector<std::string> output_port_prefix_to_remove;
output_port_prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
output_port_prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
if (!prefix_to_remove.empty()) {
if (0 == block_name.find(prefix_to_remove)) {
block_name.erase(0, prefix_to_remove.length());
break;
}
}
}
}
/* If the pin is part of a bus,
* - Check if the bus is already in the list
* - If not, add it to the port list
@ -81,26 +100,6 @@ void print_verilog_preconfig_top_module_ports(std::fstream &fp,
continue;
}
/* The block may be renamed as it contains special characters which violate Verilog syntax */
if (true == netlist_annotation.is_block_renamed(atom_blk)) {
block_name = netlist_annotation.block_name(atom_blk);
}
/* For output block, remove the prefix which is added by VPR */
std::vector<std::string> output_port_prefix_to_remove;
output_port_prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
output_port_prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
if (!prefix_to_remove.empty()) {
if (0 == block_name.find(prefix_to_remove)) {
block_name.erase(0, prefix_to_remove.length());
break;
}
}
}
}
/* Both input and output ports have only size of 1 */
BasicPort module_port(std::string(block_name), 1);
port_list.push_back(module_port);