[FPGA-Verilog] Fixed bugs in preconfigured wrapper generator when bus group is used
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@ -65,6 +65,25 @@ void print_verilog_preconfig_top_module_ports(std::fstream &fp,
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}
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std::string block_name = atom_ctx.nlist.block_name(atom_blk);
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/* The block may be renamed as it contains special characters which violate Verilog syntax */
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if (true == netlist_annotation.is_block_renamed(atom_blk)) {
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block_name = netlist_annotation.block_name(atom_blk);
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}
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/* For output block, remove the prefix which is added by VPR */
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std::vector<std::string> output_port_prefix_to_remove;
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output_port_prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
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output_port_prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
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if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
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for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
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if (!prefix_to_remove.empty()) {
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if (0 == block_name.find(prefix_to_remove)) {
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block_name.erase(0, prefix_to_remove.length());
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break;
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}
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}
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}
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}
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/* If the pin is part of a bus,
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* - Check if the bus is already in the list
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* - If not, add it to the port list
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@ -81,26 +100,6 @@ void print_verilog_preconfig_top_module_ports(std::fstream &fp,
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continue;
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}
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/* The block may be renamed as it contains special characters which violate Verilog syntax */
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if (true == netlist_annotation.is_block_renamed(atom_blk)) {
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block_name = netlist_annotation.block_name(atom_blk);
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}
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/* For output block, remove the prefix which is added by VPR */
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std::vector<std::string> output_port_prefix_to_remove;
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output_port_prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
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output_port_prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
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if (AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk)) {
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for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
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if (!prefix_to_remove.empty()) {
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if (0 == block_name.find(prefix_to_remove)) {
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block_name.erase(0, prefix_to_remove.length());
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break;
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}
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}
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}
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}
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/* Both input and output ports have only size of 1 */
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BasicPort module_port(std::string(block_name), 1);
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port_list.push_back(module_port);
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