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[test] enable rst_on_lut benchmark

This commit is contained in:
tangxifan 2023-01-18 19:45:41 -08:00
parent b7a66705e0
commit f586229b97
3 changed files with 13 additions and 2 deletions
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5
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rst_gen/config/rst_on_lut_pc.xml Normal file
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@ -0,0 +1,5 @@
<pin_constraints>
<set_io pin="op_clk[0]" net="clk"/>
<set_io pin="op_reset[0]" net="rst"/>
</pin_constraints>

6
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rst_gen/config/rst_on_lut_repack_dc.xml Normal file
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@ -0,0 +1,6 @@
<repack_design_constraints>
<pin_constraint pb_type="clb" pin="clk[0]" net="clk"/>
<pin_constraint pb_type="clb" pin="reset[0]" net="rst"/>
<!-- Leave lreset unconstrained as it may be mapped to any internal reset signals -->
</repack_design_constraints>

4
openfpga_flow/tasks/basic_tests/k4_series/k4n4_rst_gen/config/task.conf
View File

@ -42,8 +42,8 @@ bench0_openfpga_pin_constraints_file = ${PATH:TASK_DIR}/config/pin_constraints.x
bench0_openfpga_repack_design_constraint_file=${PATH:TASK_DIR}/config/repack_design_constraints.xml
bench1_top = rst_on_lut
bench1_openfpga_pin_constraints_file = ${PATH:TASK_DIR}/config/pin_constraints.xml
bench1_openfpga_repack_design_constraint_file=${PATH:TASK_DIR}/config/repack_design_constraints.xml
bench1_openfpga_pin_constraints_file = ${PATH:TASK_DIR}/config/rst_on_lut_pc.xml
bench1_openfpga_repack_design_constraint_file=${PATH:TASK_DIR}/config/rst_on_lut_repack_dc.xml
[SCRIPT_PARAM_MIN_ROUTE_CHAN_WIDTH]
end_flow_with_test=