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OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
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Merge branch 'ganesh_dev' of https://github.com/LNIS-Projects/OpenFPGA into dev

This commit is contained in:
tangxifan 2020-07-22 12:09:34 -06:00
parent b5fd6aa859 3b6cd885f3
commit f4e77e3bad
2 changed files with 24 additions and 16 deletions
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18
Dockerfile
View File

@ -1,9 +1,17 @@
FROM ubuntu:16.04 FROM ubuntu:18.04
ENV DEBIAN_FRONTEND=noninteractive
RUN apt-get update && apt-get install -y clang \
bison \
flex \
libreadline-dev \
gawk \
tcl-dev \
libffi-dev \
git \
pkg-config \
python3
RUN apt-get update -qq -y RUN apt-get -y install autoconf automake bison build-essential cmake ctags curl doxygen flex fontconfig gdb git gtkwave gperf iverilog libffi-dev libcairo2-dev libevent-dev libfontconfig1-dev liblist-moreutils-perl libncurses5-dev libx11-dev libxft-dev libxml++2.6-dev perl texinfo time valgrind zip qt5-default
RUN apt-get -y install python3 python3-dev tcl tcl8.6-dev gawk libreadline-dev
RUN apt-get -y install autoconf automake bison build-essential cmake ctags curl doxygen flex fontconfig g++-4.9 gcc-4.9 gdb git gtkwave gperf iverilog libffi-dev libcairo2-dev libevent-dev libfontconfig1-dev liblist-moreutils-perl libncurses5-dev libx11-dev libxft-dev libxml++2.6-dev perl texinfo time valgrind zip qt5-default
RUN mkdir -p /release /dev RUN mkdir -p /release /dev

22
openfpga_flow/scripts/run_fpga_flow.py
View File

@ -419,6 +419,17 @@ def prepare_run_directory(run_dir):
with open(args.openfpga_arch_file, 'w', encoding='utf-8') as archfile: with open(args.openfpga_arch_file, 'w', encoding='utf-8') as archfile:
archfile.write(tmpl.substitute(script_env_vars["PATH"])) archfile.write(tmpl.substitute(script_env_vars["PATH"]))
# Sanitize provided openshell template, if provided
if (args.openfpga_shell_template):
if not os.path.isfile(args.openfpga_shell_template or ""):
logger.error("Openfpga shell file - %s" %
args.openfpga_shell_template)
clean_up_and_exit("Provided openfpga_shell_template" +
f" {args.openfpga_shell_template} file not found")
else:
shutil.copy(args.openfpga_shell_template,
args.top_module+"_template.openfpga")
# Create benchmark dir in run_dir and copy flattern architecture file # Create benchmark dir in run_dir and copy flattern architecture file
os.mkdir("benchmark") os.mkdir("benchmark")
try: try:
@ -600,17 +611,6 @@ def collect_files_for_vpr():
clean_up_and_exit("Provided base_verilog file not found") clean_up_and_exit("Provided base_verilog file not found")
shutil.copy(args.base_verilog, args.top_module+"_output_verilog.v") shutil.copy(args.base_verilog, args.top_module+"_output_verilog.v")
# Sanitize provided openshell template, if provided
if (args.openfpga_shell_template):
if not os.path.isfile(args.openfpga_shell_template or ""):
logger.error("Openfpga shell file - %s" %
args.openfpga_shell_template)
clean_up_and_exit("Provided openfpga_shell_template" +
f" {args.openfpga_shell_template} file not found")
else:
shutil.copy(args.openfpga_shell_template,
args.top_module+"_template.openfpga")
def run_vpr(): def run_vpr():
ExecTime["VPRStart"] = time.time() ExecTime["VPRStart"] = time.time()