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[test] deploy new testcases to basic reg tests

This commit is contained in:
tangxifan 2024-06-28 13:45:36 -07:00
parent f1a4304ee7
commit f4dd222c47
1 changed files with 3 additions and 0 deletions
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3
openfpga_flow/regression_test_scripts/basic_reg_test.sh
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@ -232,7 +232,10 @@ echo -e "Testing programmable clock architecture";
run-task basic_tests/clock_network/homo_1clock_2layer $@
run-task basic_tests/clock_network/homo_1clock_2layer_full_tb $@
run-task basic_tests/clock_network/homo_2clock_2layer $@
run-task basic_tests/clock_network/homo_2clock_2layer_disable_unused $@
run-task basic_tests/clock_network/homo_2clock_2layer_disable_unused_tree $@
run-task basic_tests/clock_network/homo_1clock_1_reset_2layer $@
run-task basic_tests/clock_network/homo_1clock_1_reset_2layer_disable_unused_spines $@
run-task basic_tests/clock_network/homo_1clock_1_reset_2layer_internal_driver $@
echo -e "Testing configuration chain of a K4N4 FPGA using .blif generated by yosys+verific";