diff --git a/openfpga/src/base/openfpga_pb_pin_fixup.cpp b/openfpga/src/base/openfpga_pb_pin_fixup.cpp
index 257ed1ef7..4ac955b5b 100644
--- a/openfpga/src/base/openfpga_pb_pin_fixup.cpp
+++ b/openfpga/src/base/openfpga_pb_pin_fixup.cpp
@@ -36,8 +36,7 @@ static void update_cluster_pin_with_post_routing_results(
   const VprRoutingAnnotation& vpr_routing_annotation,
   VprClusteringAnnotation& vpr_clustering_annotation, const size_t& layer,
   const vtr::Point<size_t>& grid_coord, const ClusterBlockId& blk_id,
-  const e_side& border_side, const size_t& z,
-  const bool& perimeter_cb,
+  const e_side& border_side, const size_t& z, const bool& perimeter_cb,
   const bool& verbose) {
   /* Handle each pin */
   auto logical_block = clustering_ctx.clb_nlist.block_type(blk_id);
@@ -79,10 +78,10 @@ static void update_cluster_pin_with_post_routing_results(
       VTR_ASSERT(1 == pin_sides.size());
       pin_side = pin_sides[0];
     } else if (perimeter_cb) {
-      /* When perimeter connection blcoks are allowed, I/O pins may occur on any side but the border side */
-      VTR_ASSERT(pin_sides.end() != std::find(pin_sides.begin(),
-                                              pin_sides.end(),
-                                              border_side));
+      /* When perimeter connection blcoks are allowed, I/O pins may occur on any
+       * side but the border side */
+      VTR_ASSERT(pin_sides.end() !=
+                 std::find(pin_sides.begin(), pin_sides.end(), border_side));
       VTR_ASSERT(1 == pin_sides.size());
       pin_side = pin_sides[0];
     } else {
@@ -197,8 +196,7 @@ void update_pb_pin_with_post_routing_results(
   const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx,
   const PlacementContext& placement_ctx,
   const VprRoutingAnnotation& vpr_routing_annotation,
-  VprClusteringAnnotation& vpr_clustering_annotation,
-  const bool& perimeter_cb,
+  VprClusteringAnnotation& vpr_clustering_annotation, const bool& perimeter_cb,
   const bool& verbose) {
   /* Ensure a clean start: remove all the remapping results from VTR's
    * post-routing clustering result sync-up */
@@ -261,8 +259,8 @@ void update_pb_pin_with_post_routing_results(
         update_cluster_pin_with_post_routing_results(
           device_ctx, clustering_ctx, vpr_routing_annotation,
           vpr_clustering_annotation, layer, io_coord, cluster_blk_id, io_side,
-          placement_ctx.block_locs[cluster_blk_id].loc.sub_tile,
-          perimeter_cb, verbose);
+          placement_ctx.block_locs[cluster_blk_id].loc.sub_tile, perimeter_cb,
+          verbose);
       }
     }
   }
diff --git a/openfpga/src/base/openfpga_pb_pin_fixup.h b/openfpga/src/base/openfpga_pb_pin_fixup.h
index 37877ef1f..de60c721a 100644
--- a/openfpga/src/base/openfpga_pb_pin_fixup.h
+++ b/openfpga/src/base/openfpga_pb_pin_fixup.h
@@ -18,8 +18,7 @@ void update_pb_pin_with_post_routing_results(
   const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx,
   const PlacementContext& placement_ctx,
   const VprRoutingAnnotation& vpr_routing_annotation,
-  VprClusteringAnnotation& vpr_clustering_annotation,
-  const bool& perimeter_cb,
+  VprClusteringAnnotation& vpr_clustering_annotation, const bool& perimeter_cb,
   const bool& verbose);
 
 } /* end namespace openfpga */