From f1ce816d6ca06e0a74ef89707cc68b737417c70d Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Mon, 2 Nov 2020 15:14:02 -0700
Subject: [PATCH] [Tool] Force inout port to be mandatory for I/O cells

---
 libopenfpga/libarchopenfpga/src/check_circuit_library.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/libopenfpga/libarchopenfpga/src/check_circuit_library.cpp b/libopenfpga/libarchopenfpga/src/check_circuit_library.cpp
index 89379b2dd..7599541fd 100644
--- a/libopenfpga/libarchopenfpga/src/check_circuit_library.cpp
+++ b/libopenfpga/libarchopenfpga/src/check_circuit_library.cpp
@@ -577,8 +577,7 @@ size_t check_io_circuit_model(const CircuitLibrary& circuit_lib) {
    * iopad_port_types_required.push_back(CIRCUIT_MODEL_PORT_SRAM);
    */
   std::vector<enum e_circuit_model_port_type> iopad_port_types_required;
-  iopad_port_types_required.push_back(CIRCUIT_MODEL_PORT_INPUT);
-  iopad_port_types_required.push_back(CIRCUIT_MODEL_PORT_OUTPUT);
+  iopad_port_types_required.push_back(CIRCUIT_MODEL_PORT_INOUT);
   num_err += check_circuit_model_port_required(circuit_lib, CIRCUIT_MODEL_IOPAD, iopad_port_types_required);
 
   /* Each I/O cell must have